# SiliconCompiler > A modular hardware build system -- "make for silicon". It compiles RTL to GDSII > (ASIC) or a bitstream (FPGA) by driving pluggable flows over open-source and > commercial EDA tools. Everything is configuration in a single versioned schema, > and the Python API is a typed surface over that schema. This file follows the [llms.txt](https://llmstxt.org) convention. It exists because most of the material written about SiliconCompiler describes an API that was removed in 2025, so an assistant answering from memory will usually be wrong. The sections below state what is current; the index that follows links every page on the documentation site. ## The current API Import from `siliconcompiler`. A **`Design`** describes source code and is reusable; a **project** describes one compilation of it. Use one of the named project classes -- **`ASIC`, `FPGA`, `Lint` or `Sim`** -- rather than the bare `Project`. Choosing the class is how you say what kind of build this is, and each named class carries the schema, constraints and metrics for its domain. `Project` is only the base class they extend; a build script written against it has no domain schema and will not fit the target or flow you want. ```python from siliconcompiler import ASIC, Design from siliconcompiler.targets import skywater130_demo design = Design("heartbeat") design.set_dataroot("heartbeat", __file__) # the root for files below design.set_topmodule("heartbeat", fileset="rtl") design.add_file("heartbeat.v", dataroot="heartbeat", fileset="rtl") design.add_file("heartbeat.sdc", dataroot="heartbeat", fileset="sdc") project = ASIC(design) project.add_fileset(["rtl", "sdc"]) # which filesets to compile skywater130_demo(project) # PDK, libraries and flow project.run() project.summary() ``` Four conventions this example encodes: - **Files live in named filesets** (`rtl`, `sdc`, `xdc`, `testbench`) rather than one flat list. `Design.add_file` assigns one; `Project.add_fileset` selects which the run uses. - **Paths are rooted at a dataroot**, not the working directory. Passing `__file__` roots them at the directory holding the script -- a file path is accepted and its parent directory used -- so the build works from anywhere. An environment variable dataroot (`set_dataroot("foundry", "$FOUNDRY_ROOT/...")`) is how foundry data is referenced without committing it. - **Prefer typed accessors to raw keypaths.** `project.option.set_remote(True)` and `project.set('option', 'remote', True)` reach the same value; the accessor is the supported interface. Use a keypath when no accessor exists, which mostly means reading metrics and records: `project.get('metric', 'cellarea', step='synthesis', index='0')`. - **A target is a function you call** with the project. Flows, tool tasks, libraries and PDKs are classes you subclass. Top-level exports, in full: `Design`, `Project`, `ASIC`, `FPGA`, `Lint`, `Sim`, `PDK`, `StdCellLibrary`, `FPGADevice`, `Flowgraph`, `Checklist`, `Task`, `TaskSkip`, `OpenTask`, `ShowTask`, `ScreenshotTask`, `NodeStatus`, `sc_open`, `__version__`. ## What no longer exists This section is the reason the file is worth fetching. - **There is no `Chip` class.** `Chip('design')`, `chip.set(...)`, `chip.input(...)`, `chip.use(...)`, `chip.register_source(...)` and `chip.load_target(...)` were removed in **v0.35.0** (October 2025). They are what most training data contains. The replacement is `Design` + a project class; every old name is mapped in the migration guide linked below. - **There is no `sc` command.** The console scripts are `sc-config`, `sc-issue`, `sc-remote`, `sc-show`, `sc-install` and `smake` -- that is the complete list. A `sc -target asic_demo` invocation is from the pre-0.35 CLI and fails with `command not found`. To run something from a shell, use a Python script, `smake`, or `python3 -m siliconcompiler.demos.asic_demo`. The web dashboard is `python3 -m siliconcompiler.apps.utils.dashboard`, and the remote job server is `python3 -m siliconcompiler.remote.server`. - **`FPGA` changed meaning.** It used to be the FPGA device class; it is now the FPGA *project* class. The device is `FPGADevice`. - **Manifests are `.pkg.json`**, not `.cfg`. The `.cfg` extension predates v0.20 and any script or command using it is stale. - **`package=` is now `dataroot=`** on every path parameter (schema 0.52.0). - **The `option,mode` parameter is gone** -- pick the project class instead. ## Where new code goes A frequent request is "add a PDK to SiliconCompiler", and the answer is usually that it does not go in this repository: - **Open-source PDKs and standard cell libraries** go in the separate [`lambdapdk`](https://github.com/siliconcompiler/lambdapdk) package. - **Closed or proprietary PDKs and IP** go in your own pip-installable package, with foundry data referenced through environment-variable dataroots and never committed. - **Tool drivers, flows and targets** go in-tree, under `siliconcompiler/`. `siliconcompiler/pdks/` and `siliconcompiler/libs/` do not exist and should not be created. In-tree module directories are `tools/`, `flows/`, `targets/` and `checklists/`. ## Two version numbers The package version and the schema version are independent. The schema version (`schemaversion`) is recorded in every manifest and has its own changelog, which is the authoritative record of what was added, renamed or removed at each version -- see "Schema Changes" in the index below. ## Machine-readable schema `schema.json` at the root of this site is a generated dump of the schema for each project class: every parameter with its keypath, type, default, scope and help text. Prefer it over scraping the HTML reference. ## Repository Source, issues and discussions: . The repository root carries an `AGENTS.md` with the same orientation aimed at editing the code rather than using it. Working, tested designs are under `examples/`. ## Tutorials - [Lint Your RTL](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/lint.html): Linting checks your RTL for syntax and style problems without compiling it, and it is the quickest way to get a real result out of SiliconCompiler. - [Simulate and Verify](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/simulate.html): Between linting and building a layout sits everything that checks the design actually works. - [Bringing Your Own Design](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/own_design.html): The demo builds someone else's design. - [When a Run Fails](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/debug.html): A failed build gives you a one-line error and a directory full of files. - [Building Your Own SoC](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/picorv32_ram.html): This tutorial builds an ASIC containing a PicoRV32 RISC-V CPU core, and then the same core wired to an SRAM -- the first step toward a real system-on-chip. - [Build for an FPGA](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/fpga.html): SiliconCompiler compiles to FPGA bitstreams as well as to GDSII, through the same schema, the same flowgraph and the same run. - [Hardware Design Frontends](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/hw_frontends.html): In addition to traditional hardware description languages like Verilog and SystemVerilog, SiliconCompiler also supports higher-level languages, for ease of hardware design prototyping. - [From a model to silicon (SODA)](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/soda.html): SODA Synthesizer compiles a machine learning model into accelerator RTL. - [Implementing an IO pad ring](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/padring.html): Every build in the other tutorials stops at a rectangle of standard cells. - [Instantiating a hardened module in a design](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/hardened.html): Hardened modules allow predictable timing, efficient placement, and scalable hierarchical ASIC design. - [Hardening parameterized modules (uniquify)](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/uniquify.html): Beta feature. - [Calibrating the parasitic estimate (PEX)](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/pex_calibration.html): Before it routes a design, OpenROAD estimates every net's parasitics from a small per-layer resistance/capacitance model -- the PDK rclayer values fed to set_layer_rc. - [Multi-Job Flows and Automation](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/multi_job_flows.html): Compilation process describes setting up one job. - [Parallel Job Execution](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/parallel.html): Single-threaded performance has saturated, so making hardware compilation fast means making effective use of parallel hardware. - [Running on a Cluster](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/cluster.html): A flowgraph is a set of independent tasks with declared dependencies, which is exactly the shape a job scheduler wants. - [Running Builds in CI](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/ci.html): A SiliconCompiler build is an ordinary Python script, so any CI system that runs Python runs it. - [Authoring a Custom Flow](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/custom_flow.html): The built-in flows cover the usual paths -- lint, synthesis, RTL-to-GDSII, signoff. - [Using Commercial Tools](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/commercial_tools.html): SiliconCompiler drives commercial EDA tools as well as open-source ones -- the flowgraph does not care which tool a task wraps. - [Dashboard Tutorial](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/dashboard_tutorial.html): To start, ensure you install the dashboard dependencies by running: - [Job Status Emails](https://docs.siliconcompiler.com/en/latest/user_guide/tutorials/emails.html): SiliconCompiler supports sending job status updates to your email. ## User guide - [User Guide](https://docs.siliconcompiler.com/en/latest/user_guide/index.html): This guide provides an overview for users. - [What is SiliconCompiler?](https://docs.siliconcompiler.com/en/latest/user_guide/what_is_sc.html): SiliconCompiler is an open source, modular, build system that automates translation from hardware design source code to silicon ("make for silicon"). - [Installation](https://docs.siliconcompiler.com/en/latest/user_guide/installation.html): Before installing the SiliconCompiler package you will need to set up a Python environment. - [Quickstart guide](https://docs.siliconcompiler.com/en/latest/user_guide/quickstart.html): If you've completed the Installation section and were able to run the ASIC Demo, you will have completed a simple containerized run through an ASIC design flow! - [Using SiliconCompiler with Docker](https://docs.siliconcompiler.com/en/latest/user_guide/docker.html): To run SiliconCompiler flows using our pre-built Docker image, you first need to have Docker installed and running on your system. - [Guide to Remote Compilation](https://docs.siliconcompiler.com/en/latest/user_guide/remote_processing.html): SiliconCompiler supports a remote compilation model, allowing you to leverage cloud resources for access to pre-configured tool installations, elastic compute, and potentially NDA-protected PDKs or IPs. - [The Schema: A Centralized Data Model](https://docs.siliconcompiler.com/en/latest/user_guide/data_model.html): At the core of every SiliconCompiler project is the Schema, a centralized data structure that holds all information about the design and the compilation process. - [Compilation Process](https://docs.siliconcompiler.com/en/latest/user_guide/execution_model.html): The complete SiliconCompiler compilation is handled by a single call to the Project.run() function. - [Directory Structures](https://docs.siliconcompiler.com/en/latest/user_guide/directories.html): SiliconCompiler writes to two places: a build directory for the artifacts of a compilation, and a home directory (~/.sc) for data and settings shared across every project on the machine. - [Checklists: The Audit Model](https://docs.siliconcompiler.com/en/latest/user_guide/checklist.html): A build that finishes is not the same as a build that is signed off. - [Example Designs](https://docs.siliconcompiler.com/en/latest/user_guide/examples.html): Every directory below is a working, tested design in the examples folder of the repository. - [Glossary](https://docs.siliconcompiler.com/en/latest/user_guide/glossary.html): The following set of terms represents fundamental SiliconCompiler definitions used throughout the documentation. - [Frequently Asked Questions](https://docs.siliconcompiler.com/en/latest/user_guide/faq.html): Questions people actually ask, drawn from the issue tracker and the Help (Q&A) discussions. - [How do I...?](https://docs.siliconcompiler.com/en/latest/user_guide/howto.html): A task-oriented reference: the shortest correct way to do common things. - [Migrating from the Chip API](https://docs.siliconcompiler.com/en/latest/user_guide/migration.html): If you have a script that starts like this, you are using an API that no longer exists: ## Advanced guide: building your own modules - [Development Guide](https://docs.siliconcompiler.com/en/latest/development_guide/index.html): The following sections describe how to build your own custom modules in SiliconCompiler so that you can customize your own flow. - [Defining a Target](https://docs.siliconcompiler.com/en/latest/development_guide/targets.html): A target in SiliconCompiler is a reusable "build configuration" for a specific type of project. - [Building a Flowgraph](https://docs.siliconcompiler.com/en/latest/development_guide/flows.html): Contributing this back to the project? Where your module belongs covers the choice and CONTRIBUTING.md covers the process: branches, tests, the four lint gates, and the docs build. - [Integrating a New Tool](https://docs.siliconcompiler.com/en/latest/development_guide/tools.html): A complete set of supported tools can be found in tools. - [Defining a Process Design Kit (PDK)](https://docs.siliconcompiler.com/en/latest/development_guide/pdks.html): In semiconductor design, a Process Design Kit (PDK) contains all the technology-specific data--such as transistor models, layout rules, and standard cell libraries--required to manufacture a chip on a particular process node. - [Defining a Library](https://docs.siliconcompiler.com/en/latest/development_guide/libraries.html): In hardware design, a library is a collection of reusable components. - [Packaging an External Library](https://docs.siliconcompiler.com/en/latest/development_guide/external_libraries.html): The Defining a Library guide shows how to subclass Design, StdCellLibrary, and PDK to describe a piece of IP. - [Working with Metrics](https://docs.siliconcompiler.com/en/latest/development_guide/metrics.html): In SiliconCompiler, metrics measure the quality of a compilation run; the ones a run is judged on are its key performance indicators (KPIs). - [Execution Records and Provenance](https://docs.siliconcompiler.com/en/latest/development_guide/records.html): To support hardware provenance and ensure reproducibility, SiliconCompiler automatically records key information during every compilation run. - [User Settings](https://docs.siliconcompiler.com/en/latest/development_guide/options.html): SiliconCompiler provides a robust system for managing persistent user configuration across different sessions and tools. - [Contributing to SiliconCompiler](https://docs.siliconcompiler.com/en/latest/development_guide/contribution.html): SiliconCompiler is built for community collaboration. ## Reference (generated from the source tree) - [References](https://docs.siliconcompiler.com/en/latest/reference_manual/index.html): The following sections provides details on the functions, modules and objects included in SiliconCompiler. - [Pre-Defined Targets](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/targets.html): The following are examples of pre-built targets that come with SiliconCompiler which you can use for your own builds. - [Pre-Defined Flows](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/flows.html): The following are examples of pre-built flows that come with SiliconCompiler which you can use for your own builds. - [Pre-Defined Tools](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/tools.html): The following are examples of pre-built tool drivers that come with SiliconCompiler which you can use for your own builds. - [Pre-Defined PDKs](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/pdks.html): The following are examples of pre-built pdks that come with SiliconCompiler which you can use for your own builds. - [Pre-Defined Libraries](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/libs.html): The following are examples of pre-built libraries that come with SiliconCompiler which you can use for your own builds. - [Pre-Defined Checklists](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/checklists.html): The following are examples of pre-built checklists that come with SiliconCompiler which you can use for your own builds. - [Data Sources](https://docs.siliconcompiler.com/en/latest/reference_manual/predef_modules/resolvers.html): A dataroot is registered with set_dataroot(name, path, tag=None), and the scheme its path starts with picks what fetches it. - [Schema](https://docs.siliconcompiler.com/en/latest/reference_manual/schema.html): Whether to copy files into build directory, applies to files only - [Schema API](https://docs.siliconcompiler.com/en/latest/reference_manual/schema_api.html): This chapter describes all public methods in the SiliconCompiler Schema Python API. - [CLI apps](https://docs.siliconcompiler.com/en/latest/reference_manual/apps.html) - [Server API](https://docs.siliconcompiler.com/en/latest/reference_manual/server_api.html): Schema describing parameters for checking the progress of an ongoing job. - [Leflib API](https://docs.siliconcompiler.com/en/latest/reference_manual/leflib_api.html): Given a path to a LEF file, this function parses the file and returns a dictionary representing the contents of the LEF file. - [Uniquify API](https://docs.siliconcompiler.com/en/latest/reference_manual/uniquify_api.html): This chapter describes the public API for hardening parameterized modules. - [Design Glossary](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/design_resources.html): A broad index of semiconductor design vocabulary, each entry linking out to further reading. - [Slurm setup](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/slurmsetup.html): The SiliconCompiler project is capable of deferring individual job steps to hosts in a high-performance computing cluster. - [Licenses](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/licenses.html): Original SiliconCompiler software is licensed under an Apache 2.0 license. - [Revision History and Change Log](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/changelog.html): The changes in each SiliconCompiler release version are described below. - [Schema Changes](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/schema_changelog.html): All notable changes to the SiliconCompiler schema version (schemaversion) are documented here. - [Machine-readable documentation](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/machine_readable.html): Three files are published alongside this site for programs rather than people: editor tooling, validators, scripts, and code assistants answering questions about SiliconCompiler. - [Dashboard](https://docs.siliconcompiler.com/en/latest/reference_manual/appendix/dashboard_how_to_guide.html): To start, ensure you install the dashboard dependencies by running: ## Other - [Welcome to SiliconCompiler's Documentation!](https://docs.siliconcompiler.com/en/latest/index.html): Useful Links: What is SiliconCompiler? | Installation | GitHub Repo | File an Issue