User Guide
Tutorials
Reference Manual
Chip
Chip.add()
Chip.allkeys()
Chip.archive()
Chip.audit_manifest()
Chip.calc_area()
Chip.calc_dpw()
Chip.calc_yield()
Chip.check_checklist()
Chip.check_filepaths()
Chip.check_logfile()
Chip.check_manifest()
Chip.clock()
Chip.create_cmdline()
Chip.design
Chip.edge()
Chip.error()
Chip.find_files()
Chip.find_function()
Chip.find_result()
Chip.get()
Chip.getdict()
Chip.getkeys()
Chip.graph()
Chip.grep()
Chip.hash_files()
Chip.help()
Chip.input()
Chip.join()
Chip.list_steps()
Chip.load_target()
Chip.maximum()
Chip.minimum()
Chip.mux()
Chip.node()
Chip.nop()
Chip.output()
Chip.pipe()
Chip.read_file()
Chip.read_manifest()
Chip.run()
Chip.set()
Chip.show()
Chip.summary()
Chip.top()
Chip.unset()
Chip.update()
Chip.use()
Chip.valid()
Chip.verify()
Chip.write_depgraph()
Chip.write_flowgraph()
Chip.write_manifest()
SiliconCompilerError
Sup
Sup.check()
Sup.clear()
Sup.info()
Sup.install()
Sup.publish()
Sup.search()
Sup.uninstall()
Floorplan
Floorplan.available_cells
Floorplan.diearea
Floorplan.layers
Floorplan.stdcell_width
Floorplan.stdcell_height
Floorplan.add_net()
Floorplan.add_via()
Floorplan.create_diearea()
Floorplan.fill_io_region()
Floorplan.generate_rows()
Floorplan.generate_tracks()
Floorplan.get_layers()
Floorplan.insert_vias()
Floorplan.place_blockage()
Floorplan.place_macros()
Floorplan.place_obstruction()
Floorplan.place_pins()
Floorplan.place_ring()
Floorplan.place_vias()
Floorplan.place_wires()
Floorplan.snap()
Floorplan.snap_to_x_track()
Floorplan.snap_to_y_track()
Floorplan.write_def()
Floorplan.write_lef()
render_tuple()
parse()
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