1. Schema

1.1. Keywords

default

Reserved SiliconCompiler schema key that can be replaced by any legal string.

1.2. Parameter Fields

author

File author. The author string records the person/entity that authored/created each item in the list of files within ‘value’ parameter field. The ‘author’ field can be used to validate the provenance of the data used for compilation.

date

String containing the data stamp of each item in the list of files within ‘value’ parameter field. The ‘date’ field can be used to validate the provenance of the data used for compilation.

defvalue

Default value for the parameter. The default value must agree with the parameter ‘type’. To specify that a parameter has no default value, set the defvalue to [] (ie empty list) for a list type and to ‘null’ or None for a non-list/scalar type.

example

List of two strings, the first string containing an example for specifying the parameter using a command line switch, and a second string for setting the value using the core Python API. The examples can be pruned/filtered before the schema is dumped into a JSON file.

hashalgo

Hasing algorithm useed to calculate filehash value.

filehash

Calculated file hash value for each file in the ‘value’ field of the parameter.

help

Complete parameter help doc string. The help string serves as ground truth for describing the parameter functionality and should be used for long help descriptions in command line interface programs and for automated schema document generation. The long help can be pruned/filtered before the schema is dumped into a JSON file.

lock

Boolean value dictating whether the parameter can be modified by the set/get/add core API methods. A value of True specifiers that the parameter is locked and cannot be modified. Attempts to write to to a locked parameter shall result in an exception/error that blocks compilation progress.

require

String that specifies scenarios, conditions, and modes for which the parameter must return a non-empty value. Valid requirement keywords include ‘all’ and ‘fpga’/’asic’. The ‘all’ keyword specifies that the parameter must always have a non-empty value before running a flow. The ‘fpga’/’asic’ keyword specifies that that the parameter must have a non-empty value when the respective mode is being executed. All Boolean values have a valid True/False default value and a requirement of ‘all’. The vast majority of schema parameters have requirements of None and empty values which can be overriden by the user based on need.

signature

String recording a unique machine calculated string for each item in the list of files within ‘value’ parameter field. The ‘signature’ field can be used to validate the provenance of the data used for compilation.

switch

String that specifies the equivalent switch to use in command line interfaces. The switch string must start with a ‘-’ and cannot contain spaces.

shorthelp

Short help string to be used in cases where brevity matters. Use cases include JSON dictionary dumps and command line interface help functions.

type

The parameter type. Supported types include Python compatible types (‘int’, ‘float’, and ‘bool’) and two custom file types (‘file’ and ‘dir’). The ‘file’ and ‘dir’ type specify that the parameter is a ‘regular’ file or directory as described by Posix. All types except for the ‘bool’ types can be specified as a Python compatible list type by enclosing the type value in brackets. (ie. [str] specifies that the parameter is a list of strings). Additionally strings, integers, and floats can be tagged as tuples, using the Python parentheses like syntax (eg. [(float,float)] specifies a list of 2-float tuples). Input arguments and return values of the set/get/add core methods are encoded as native Python types. The JSON format does not natively support all of these data types, so to ensure platform interoperability, all SC schema parameters are converted to strings before being exported to a json file. Additionally, note that the parameter value ‘None’ gets translated to the “null”, True gets translated to “true”, and False gets translated to “false” before JSON export.

1.3. Parameters

1.3.1. arg

1.3.1.1. flow

Description

ARG: Flow argument

Type

[str]

Default Value

[]

CLI Switch

-arg_flow 'key <str>'

Example (CLI)

-arg_flow 'n 100'

Example (API)

chip.set('arg','flow','n', 100)

Parameter passed in as key/value pair to the flow target referenced in the load_flow() API call. See the target flow for specific guidelines regarding configuration parameters.

1.3.1.2. index

Description

ARG: Index argument

Type

str

Default Value

None

CLI Switch

-arg_index <str>

Example (CLI)

-arg_index 0

Example (API)

chip.set('arg','index','0')

Dynamic parameter passed in by the sc runtime as an argument to a runtime task. The parameter enables configuration code (usually TCL) to use control flow that depend on the current ‘index’. The parameter is used the run() function and is not intended for external use.

1.3.1.3. pdk

Description

ARG: PDK argument

Type

[str]

Default Value

[]

CLI Switch

-arg_pdk 'key <str>

Example (CLI)

-arg_pdk 'mimcap true'

Example (API)

chip.set('arg','pdk','mimcap','true')

Parameter passed in as key/value pair to the technology target referenced in the load_pdk() API call. See the target technology for specific guidelines regarding configuration parameters.

1.3.1.4. step

Description

ARG: Step argument

Type

str

Default Value

None

CLI Switch

-arg_step <str>

Example (CLI)

-arg_step 'route'

Example (API)

chip.set('arg', 'step', 'route')

Dynamic parameter passed in by the sc runtime as an argument to a runtime task. The parameter enables configuration code (usually TCL) to use control flow that depend on the current ‘step’. The parameter is used the run() function and is not intended for external use.

1.3.2. asic

1.3.2.1. aspectratio

Description

ASIC: block aspect ratio

Type

float

Default Value

None

CLI Switch

-asic_aspectratio <float>

Example (CLI)

-asic_aspectratio 2.0

Example (API)

chip.set('asic', 'aspectratio', '2.0')

Height to width ratio of the block for automated floor-planning. Values below 0.1 and above 10 should be avoided as they will likely fail to converge during placement and routing. The ideal aspect ratio for most designs is 1. This value is only used when no diearea or floorplan is supplied.

1.3.2.2. cells

1.3.2.2.1. antenna

Description

ASIC: antenna cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_antenna '<str>'

Example (CLI)

-asic_cells_antenna '*eco*'

Example (API)

chip.set('asic','cells',antenna,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.2. buf

Description

ASIC: buf cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_buf '<str>'

Example (CLI)

-asic_cells_buf '*eco*'

Example (API)

chip.set('asic','cells',buf,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.3. clkbuf

Description

ASIC: clkbuf cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clkbuf '<str>'

Example (CLI)

-asic_cells_clkbuf '*eco*'

Example (API)

chip.set('asic','cells',clkbuf,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.4. clkdelay

Description

ASIC: clkdelay cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clkdelay '<str>'

Example (CLI)

-asic_cells_clkdelay '*eco*'

Example (API)

chip.set('asic','cells',clkdelay,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.5. clkgate

Description

ASIC: clkgate cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clkgate '<str>'

Example (CLI)

-asic_cells_clkgate '*eco*'

Example (API)

chip.set('asic','cells',clkgate,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.6. clkicg

Description

ASIC: clkicg cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clkicg '<str>'

Example (CLI)

-asic_cells_clkicg '*eco*'

Example (API)

chip.set('asic','cells',clkicg,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.7. clkinv

Description

ASIC: clkinv cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clkinv '<str>'

Example (CLI)

-asic_cells_clkinv '*eco*'

Example (API)

chip.set('asic','cells',clkinv,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.8. clklogic

Description

ASIC: clklogic cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_clklogic '<str>'

Example (CLI)

-asic_cells_clklogic '*eco*'

Example (API)

chip.set('asic','cells',clklogic,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.9. decap

Description

ASIC: decap cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_decap '<str>'

Example (CLI)

-asic_cells_decap '*eco*'

Example (API)

chip.set('asic','cells',decap,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.10. delay

Description

ASIC: delay cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_delay '<str>'

Example (CLI)

-asic_cells_delay '*eco*'

Example (API)

chip.set('asic','cells',delay,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.11. driver

Description

ASIC: driver cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_driver '<str>'

Example (CLI)

-asic_cells_driver '*eco*'

Example (API)

chip.set('asic','cells',driver,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.12. endcap

Description

ASIC: endcap cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_endcap '<str>'

Example (CLI)

-asic_cells_endcap '*eco*'

Example (API)

chip.set('asic','cells',endcap,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.13. filler

Description

ASIC: filler cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_filler '<str>'

Example (CLI)

-asic_cells_filler '*eco*'

Example (API)

chip.set('asic','cells',filler,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.14. hold

Description

ASIC: hold cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_hold '<str>'

Example (CLI)

-asic_cells_hold '*eco*'

Example (API)

chip.set('asic','cells',hold,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.15. ignore

Description

ASIC: ignore cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_ignore '<str>'

Example (CLI)

-asic_cells_ignore '*eco*'

Example (API)

chip.set('asic','cells',ignore,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.16. load

Description

ASIC: load cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_load '<str>'

Example (CLI)

-asic_cells_load '*eco*'

Example (API)

chip.set('asic','cells',load,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.17. tap

Description

ASIC: tap cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_tap '<str>'

Example (CLI)

-asic_cells_tap '*eco*'

Example (API)

chip.set('asic','cells',tap,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.2.18. tie

Description

ASIC: tie cell list

Type

[str]

Default Value

[]

CLI Switch

-asic_cells_tie '<str>'

Example (CLI)

-asic_cells_tie '*eco*'

Example (API)

chip.set('asic','cells',tie,'*eco*')

List of cells grouped by a property that can be accessed directly by the designer and tools. The example below shows how all cells containing the string ‘eco’ could be marked as dont use for the tool.

1.3.2.3. corearea

Description

ASIC: core area outline

Type

[(float,float)]

Default Value

[]

CLI Switch

-asic_corearea <[(float,float)]>

Example (CLI)

-asic_corearea '(0,0)'

Example (API)

chip.set('asic', 'corearea', (0,0))

List of (x,y) points that define the outline of the core area for the physical design. Simple rectangle areas can be defined with two points, one for the lower left corner and one for the upper right corner. All values are specified in microns.

1.3.2.4. coremargin

Description

ASIC: block core margin

Type

float

Default Value

None

CLI Switch

-asic_coremargin <float>

Example (CLI)

-asic_coremargin 1

Example (API)

chip.set('asic', 'coremargin', '1')

Halo/margin between the die boundary and core placement for automated floorplanning when no diearea or floorplan is supplied.

1.3.2.5. delaymodel

Description

ASIC: delay model

Type

str

Default Value

None

CLI Switch

-asic_delaymodel <str>

Example (CLI)

-asic_delaymodel ccs

Example (API)

chip.set('asic', 'delaymodel', 'ccs')

Delay model to use for the target libs. Supported values are nldm and ccs.

1.3.2.6. density

Description

ASIC: target core density

Type

float

Default Value

None

CLI Switch

-asic_density <float>

Example (CLI)

-asic_density 30

Example (API)

chip.set('asic', 'density', '30')

Target density based on the total design cell area reported after synthesis. This number is used when no diearea or floorplan is supplied. Any number between 1 and 100 is legal, but values above 50 may fail due to area/congestion issues during apr.

1.3.2.7. diearea

Description

ASIC: die area outline

Type

[(float,float)]

Default Value

[]

CLI Switch

-asic_diearea <[(float,float)]>

Example (CLI)

-asic_diearea '(0,0)'

Example (API)

chip.set('asic', 'diearea', (0,0))

List of (x,y) points that define the outline of the die area for the physical design. Simple rectangle areas can be defined with two points, one for the lower left corner and one for the upper right corner. All values are specified in microns.

1.3.2.8. dir

Description

ASIC: special directory

Type

[dir]

Default Value

[]

CLI Switch

-asic_dir 'tool key <dir>'

Example (CLI)

-asic_dir 'lib atool db ~/libdb'

Example (API)

chip.set('asic','dir','atool','db','~/libdb')

List of named dirs specified on a per tool basis. The parameter should only be used for specifying dirs that are not directly supported by the ASIC schema.

1.3.2.9. file

Description

ASIC: special file

Type

[file]

Default Value

[]

CLI Switch

-asic_file 'tool key<file>'

Example (CLI)

-asic_file 'yosys presyn ~/presyn.tcl'

Example (API)

chip.set('asic','file','yosys','presyn','~/presyn.tcl')

List of named files specified on a per tool basis. The parameter should only be used for specifying files that are not directly supported by the ASIC schema.

1.3.2.10. footprint

1.3.2.10.1. alias

Description

ASIC: Footprint name aliases

Type

[str]

Default Value

[]

CLI Switch

-asic_footprint_alias 'key <str>'

Example (CLI)

-asic_footprint_alias '12track FreeCell'

Example (API)

chip.set('asic','footprint','12track','alias','FreeCell')

Alias for the footprint key that is sometimes needed when the footprint can be referenced by multiple names. The key is the ‘official’ footprint.

1.3.2.10.2. size

Description

ASIC: Footprint size

Type

(float,float)

Default Value

None

CLI Switch

-asic_footprint_size 'key <str>'

Example (CLI)

-asic_footprint_size 'core (1.0,1.0)'

Example (API)

chip.set('asic','footprint','core','size',(1.0,1.0))

Size of the footprint described as a (width, height) tuple in microns.

1.3.2.10.3. symmetry

Description

ASIC: Footprint symmetry

Type

str

Default Value

None

CLI Switch

-asic_footprint_symmetry 'key <str>'

Example (CLI)

-asic_footprint_symmetry 'core X Y'

Example (API)

chip.set('asic','footprint','core','symmetry','X Y')

Footprint symmetry based on LEF standard definition. ‘X’ implies symmetric about the x axis, ‘Y’ implies symmetry about the y axis, and ‘X Y’ implies symmetry about the x and y axis.

1.3.2.11. hpinlayer

Description

ASIC: vertical pin layer

Type

str

Default Value

None

CLI Switch

-asic_hpinlayer <str>

Example (CLI)

-asic_hpinlayer m4

Example (API)

chip.set('asic', 'hpinlayer', 'm4')

Metal layer to use for automated horizontal pin placement during APR. The metal layers can be specified as technology agnostic SC layers starting with m1 or as hard PDK specific layer names.

1.3.2.12. libarch

Description

ASIC: library architecture

Type

str

Default Value

None

CLI Switch

-asic_libarch '<str>'

Example (CLI)

-asic_libarch '12track'

Example (API)

chip.set('asic','libarch','12track')

The library architecture (e.g. library height) used to build the design. For example a PDK with support for 9 and 12 track libraries might have ‘libarchs’ called 9t and 12t.

1.3.2.13. logiclib

Description

ASIC: logic libraries

Type

[str]

Default Value

[]

CLI Switch

-asic_logiclib <str>

Example (CLI)

-asic_logiclib nangate45

Example (API)

chip.set('asic', 'logiclib','nangate45')

List of all selected logic libraries libraries to use for optimization for a given library architecture (9T, 11T, etc).

1.3.2.14. macrolib

Description

ASIC: macro libraries

Type

[str]

Default Value

[]

CLI Switch

-asic_macrolib <str>

Example (CLI)

-asic_macrolib sram64x1024

Example (API)

chip.set('asic', 'macrolib','sram64x1024')

List of macro libraries to be linked in during synthesis and place and route. Macro libraries are used for resolving instances but are not used as targets for logic synthesis.

1.3.2.15. maxcap

Description

ASIC: maximum net capacitance

Type

float

Default Value

None

CLI Switch

-asic_maxcap <float>

Example (CLI)

-asic_maxcap '0.25e-12'

Example (API)

chip.set('asic', 'maxcap', '0.25e-12')

Maximum allowed capacitance per net.

1.3.2.16. maxfanout

Description

ASIC: maximum fanout

Type

int

Default Value

None

CLI Switch

-asic_maxfanout <int>

Example (CLI)

-asic_maxfanout 64

Example (API)

chip.set('asic', 'maxfanout', '64')

Maximum driver fanout allowed during automated place and route.

The parameter directs the APR tool to break up any net with fanout larger than maxfanout into sub nets and buffer.

1.3.2.17. maxlayer

Description

ASIC: maximum routing layer

Type

str

Default Value

None

CLI Switch

-asic_maxlayer <str>

Example (CLI)

-asic_maxlayer m2

Example (API)

chip.set('asic', 'maxlayer', 'm2')

Maximum SC metal layer name to be used for automated place and route . Alternatively the layer can be a string that matches a layer hard coded in the pdk_aprtech file. Designers wishing to use the same setup across multiple process nodes should use the integer approach. For processes with ambiguous starting routing layers, exact strings should be used.

1.3.2.18. maxlength

Description

ASIC: maximum wire length

Type

float

Default Value

None

CLI Switch

-asic_maxlength <float>

Example (CLI)

-asic_maxlength 1000

Example (API)

chip.set('asic', 'maxlength', '1000')

Maximum total wire length allowed in design during APR. Any net that is longer than maxlength is broken up into segments by the tool.

1.3.2.19. maxslew

Description

ASIC: maximum slew

Type

float

Default Value

None

CLI Switch

-asic_maxslew <float>

Example (CLI)

-asic_maxslew '0.25e-9'

Example (API)

chip.set('asic', 'maxslew', '0.25e-9')

Maximum allowed transition time per net.

1.3.2.20. minlayer

Description

ASIC: minimum routing layer

Type

str

Default Value

None

CLI Switch

-asic_minlayer <str>

Example (CLI)

-asic_minlayer m2

Example (API)

chip.set('asic', 'minlayer', 'm2')

Minimum SC metal layer name to be used for automated place and route . Alternatively the layer can be a string that matches a layer hard coded in the pdk_aprtech file. Designers wishing to use the same setup across multiple process nodes should use the integer approach. For processes with ambiguous starting routing layers, exact strings should be used.

1.3.2.21. ndr

Description

ASIC: non-default routing rule

Type

(float,float)

Default Value

None

CLI Switch

-asic_ndr 'netname <(float,float)>

Example (CLI)

-asic_ndr 'clk (0.2,0.2)'

Example (API)

chip.set('asic','ndr','clk', (0.2,0.2))

Definitions of non-default routing rule specified on a per net basis. Constraints are entered as a (width,space) tuples specified in microns.

1.3.2.22. pdk

Description

ASIC PDK target

Type

str

Default Value

None

CLI Switch

-asic_pdk <str>

Example (CLI)

-asic_pdk freepdk45

Example (API)

chip.set('asic','pdk','freepdk45')

Target ASIC PDK to use in the design.

1.3.2.23. pgmetal

Description

ASIC: powergrid layer

Type

str

Default Value

None

CLI Switch

-asic_pgmetal '<str>'

Example (CLI)

-asic_pgmetal m1

Example (API)

chip.set('asic','pgmetal','m1')

Top metal layer used for power and ground routing within the library. The parameter can be used to guide cell power grid hookup by APR tools.

1.3.2.24. rclayer

Description

ASIC: parasitics layer

Type

str

Default Value

None

CLI Switch

-asic_rclayer 'sigtype <str>'

Example (CLI)

-asic_rclayer 'clk m3'

Example (API)

chip.set('asic', 'rclayer', 'clk', 'm3')

Technology agnostic metal layer to be used for parasitic extraction estimation during APR for the wire type specified Current the supported wire types are: clk, data. The metal layers can be specified as technology agnostic SC layers starting with m1 or as hard PDK specific layer names.

1.3.2.25. stackup

Description

ASIC Stackup target

Type

str

Default Value

None

CLI Switch

-asic_stackup <str>

Example (CLI)

-asic_stackup 2MA4MB2MC

Example (API)

chip.set('asic','stackup','2MA4MB2MC')

Target ASIC stackup to use in the design. The stackup is required parameter for PDKs with multiple metal stackups.

1.3.2.26. var

Description

ASIC: special variable

Type

[str]

Default Value

[]

CLI Switch

-asic_variable 'tool key <str>'

Example (CLI)

-asic_variable 'xyce modeltype bsim4'

Example (API)

chip.set('asic','var','xyce','modeltype','bsim4')

List of key/value strings specified on a per basis. The parameter should only be used for specifying variables that are not directly supported by the SiliconCompiler PDK schema.

1.3.2.27. vpinlayer

Description

ASIC: vertical pin layer

Type

str

Default Value

None

CLI Switch

-asic_vpinlayer <str>

Example (CLI)

-asic_vpinlayer m3

Example (API)

chip.set('asic', 'vpinlayer', 'm3')

Metal layer to use for automated vertical pin placement during APR. The metal layers can be specified as technology agnostic SC layers starting with m1 or as hard PDK specific layer names.

1.3.3. checklist

1.3.3.1. criteria

Description

Checklist: item criteria

Type

[str]

Default Value

[]

CLI Switch

-checklist_criteria 'standard item <float>'

Example (CLI)

-checklist_criteria 'ISO D000 errors==0'

Example (API)

chip.set('checklist','ISO','D000','criteria','errors==0')

Simple list of signoff criteria for checklist item which must all be met for signoff. Each signoff criteria consists of a metric, a relational operator, and a value in the form. ‘metric op value’.

1.3.3.2. dataformat

Description

Checklist: item data format

Type

str

Default Value

None

CLI Switch

-checklist_dataformat 'standard item <float>'

Example (CLI)

-checklist_dataformat 'ISO D000 dataformat README'

Example (API)

chip.set('checklist','ISO','D000','dataformat','README')

Free text description of the type of data files acceptable as checklist signoff validation.

1.3.3.3. description

Description

Checklist: item description

Type

str

Default Value

None

CLI Switch

-checklist_description 'standard item <str>

Example (CLI)

-checklist_description 'ISO D000 A-DESCRIPTION'

Example (API)

chip.set('checklist','ISO','D000','description','A-DESCRIPTION')

A short one line description of the checklist item.

1.3.3.4. ok

Description

Checklist: item ok

Type

bool

Default Value

false

CLI Switch

-checklist_ok 'standard item <str>'

Example (CLI)

-checklist_ok 'ISO D000 true'

Example (API)

chip.set('checklist','ISO','D000','ok', True)

Boolean check mark for the checklist item. A value of True indicates a human has inspected the all item dictionary parameters check out.

1.3.3.5. rationale

Description

Checklist: item rational

Type

[str]

Default Value

[]

CLI Switch

-checklist_rationale 'standard item <str>

Example (CLI)

-checklist_rational 'ISO D000 reliability'

Example (API)

chip.set('checklist','ISO','D000','rationale','reliability')

Rationale for the the checklist item. Rationale should be a unique alphanumeric code used by the standard or a short one line or single word description.

1.3.3.6. report

Description

Checklist: item report

Type

[file]

Default Value

[]

CLI Switch

-checklist_report 'standard item <file>'

Example (CLI)

-checklist_report 'ISO D000 my.rpt'

Example (API)

chip.set('checklist','ISO','D000','report','my.rpt')

Filepath to report(s) of specified type documenting the successful validation of the checklist item.

1.3.3.7. requirement

Description

Checklist: item requirement

Type

str

Default Value

None

CLI Switch

-checklist_requirement 'standard item <str>

Example (CLI)

-checklist_requirement 'ISO D000 DOCSTRING'

Example (API)

chip.set('checklist','ISO','D000','requirement','DOCSTRING')

A complete requirement description of the checklist item entered as a multi-line string.

1.3.3.8. task

Description

Checklist: item task

Type

[(str,str,str)]

Default Value

[]

CLI Switch

-checklist_task 'standard item <(str, str, str)>'

Example (CLI)

-checklist_task 'ISO D000 (job0,place,0)'

Example (API)

chip.set('checklist','ISO','D000','task',('job0','place','0'))

Flowgraph job and task used to verify the checklist item. The parameter should be left empty for manual and for tool flows that bypass the SC infrastructure.

1.3.3.9. waiver

Description

Checklist: item metric waivers

Type

[file]

Default Value

[]

CLI Switch

-checklist_waiver 'standard item metric <file>'

Example (CLI)

-checklist_waiver 'ISO D000 bold my.txt'

Example (API)

chip.set('checklist','ISO','D000','waiver','hold', 'my.txt')

Filepath to report(s) documenting waivers for the checklist item specified on a per metric basis.

1.3.4. constraint

1.3.4.1. check

Description

Constraint checks to perform

Type

[str]

Default Value

[]

CLI Switch

-constraint_check 'scenario <str>'

Example (CLI)

-constraint_check 'worst check setup'

Example (API)

chip.add('constraint','worst','check','setup')

List of checks for to perform for the scenario. The checks must align with the capabilities of the EDA tools and flow being used. Checks generally include objectives like meeting setup and hold goals and minimize power. Standard check names include setup, hold, power, noise, reliability.

1.3.4.2. file

Description

Constraint files

Type

[file]

Default Value

[]

CLI Switch

-constraint_file 'scenario <file>'

Example (CLI)

-constraint_file 'worst hello.sdc'

Example (API)

chip.set('constraint','worst','file', 'hello.sdc')

List of timing constraint files to use for the scenario. The values are combined with any constraints specified by the design ‘constraint’ parameter. If no constraints are found, a default constraint file is used based on the clock definitions.

1.3.4.3. libcorner

Description

Constraint library corner

Type

str

Default Value

None

CLI Switch

-constraint_libcorner 'scenario <str>'

Example (CLI)

-constraint_libcorner 'worst ttt'

Example (API)

chip.set('constraint', 'worst', 'libcorner', 'ttt')

Library corner applied to the scenario to scale library timing models based on the libcorner value for models that support it. The parameter is ignored for libraries that have one hard coded model per libcorner.

1.3.4.4. mode

Description

Constraint operating mode

Type

str

Default Value

None

CLI Switch

-constraint_mode 'scenario <str>'

Example (CLI)

-constraint_mode 'worst test'

Example (API)

chip.set('constraint',  'worst','mode', 'test')

Operating mode for the scenario. Operating mode strings can be values such as test, functional, standby.

1.3.4.5. opcond

Description

Constraint operating condition

Type

str

Default Value

None

CLI Switch

-constraint_opcond 'scenario <str>'

Example (CLI)

-constraint_opcond 'worst typical_1.0'

Example (API)

chip.set('constraint', 'worst', 'opcond',  'typical_1.0')

Operating condition applied to the scenario. The value can be used to access specific conditions within the library timing models from the ‘logiclib’ timing models.

1.3.4.6. pexcorner

Description

Constraint pex corner

Type

str

Default Value

None

CLI Switch

-constraint_pexcorner 'scenario <str>'

Example (CLI)

-constraint_pexcorner 'worst max'

Example (API)

chip.set('constraint', 'worst', 'pexcorner', 'max')

Parasitic corner applied to the scenario. The ‘pexcorner’ string must match a corner found in the pdk pexmodel setup.

1.3.4.7. temperature

Description

Constraint temperature

Type

float

Default Value

None

CLI Switch

-constraint_temperature 'scenario <float>'

Example (CLI)

-constraint_temperature 'worst 125'

Example (API)

chip.set('constraint', 'worst', 'temperature','125')

Chip temperature applied to the scenario specified in degrees C.

1.3.4.8. voltage

Description

Constraint voltage level

Type

float

Default Value

None

CLI Switch

-constraint_voltage 'scenario <float>'

Example (CLI)

-constraint_voltage 'worst 0.9'

Example (API)

chip.set('constraint', 'worst','voltage', '0.9')

Operating voltage applied to the scenario.

1.3.5. datasheet

1.3.5.1. feature

Description

Datasheet: device feature specification

Type

float

Default Value

None

CLI Switch

-datasheet_feature 'design name <float>'

Example (CLI)

-datasheet_feature 'mydevice ram 64e6'

Example (API)

chip.set('datasheet','mydevice','feature','ram', 1e9)

Quantity of a specified feature. The ‘unit’ field should be used to specify the units used when unclear.

1.3.5.2. limits

1.3.5.2.1. junctiontemp

Description

Datasheet: absolute junction temperature limits

Type

(float,float)

Default Value

None

CLI Switch

-datasheet_junctiontemp 'design <(float,float)>'

Example (CLI)

-datasheet_junctiontemp 'mydevice (-40,125)'

Example (API)

chip.set('datasheet','mydevice','limits','junctiontemp',(-40,125))

Device absolute junction temperature limits not to be exceeded.

1.3.5.2.2. storagetemp

Description

Datasheet: absolute storage temperature limits

Type

(float,float)

Default Value

None

CLI Switch

-datasheet_storagetemp 'design <(float,float)>'

Example (CLI)

-datasheet_storagetemp 'mydevice (-40,125)'

Example (API)

chip.set('datasheet','mydevice','limits','storagetemp',(-40,125))

Device absolute storage temperature limits not to be exceeded.

1.3.5.2.3. voltage

Description

Datasheet: absolute voltage limits

Type

(float,float)

Default Value

None

CLI Switch

-datasheet_limits_voltage 'design pin <(float,float)>'

Example (CLI)

-datasheet_limits_voltage 'mydevice vdd (-0.4,1.1)'

Example (API)

chip.set('datasheet','mydevice','limits','voltage','vdd', (-0.4,1.1))

Device absolute minimum/maximum voltage not to be exceeded, specified on a per pin basis.

1.3.5.3. pin

1.3.5.3.1. capacitance

Description

Datasheet: capacitance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_capacitance 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_capacitance 'mydevice sclk global (1e-12, 1.2e-12, 1.5e-12)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','capacitance','global',(1e-12, 1.2e-12, 1.5e-12)

Pin capacitance. Values are tuples of (min, typical, max).

1.3.5.3.2. clk

Description

Datasheet: pin related clock

Type

str

Default Value

None

CLI Switch

-datasheet_pin_clk 'design name mode <str>'

Example (CLI)

-datasheet_pin_clk 'mydevice ina global clka'

Example (API)

chip.set('datasheet','mydevice','pin','ina','clk','global','clka')

Pin related clock specified on a per mode basis.

1.3.5.3.3. complement

Description

Datasheet: pin complement

Type

str

Default Value

None

CLI Switch

-datasheet_pin_complement 'design name mode <str>'

Example (CLI)

-datasheet_pin_complement 'mydevice ina global inb'

Example (API)

chip.set('datasheet','mydevice','pin','ina','complement','global','inb')

Pin complement specified on a per mode basis for differential signals.

1.3.5.3.4. dir

Description

Datasheet: pin direction

Type

str

Default Value

None

CLI Switch

-datasheet_pin_dir 'design name mode <str>'

Example (CLI)

-datasheet_pin_dir 'mydevice clk global input'

Example (API)

chip.set('datasheet','mydevice','pin','clk','dir','global','input')

Pin direction specified on a per mode basis. Acceptable pin directions include: input, output, inout.

1.3.5.3.5. dutycycle

Description

Datasheet: duty cycle

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_dutycycle 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_dutycycle 'mydevice sclk global (45, 50, 55)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','dutycycle','global',(45, 50, 55)

Pin duty cycle. Values are tuples of (min, typical, max).

1.3.5.3.6. ground

Description

Datasheet: pin related ground

Type

str

Default Value

None

CLI Switch

-datasheet_pin_ground 'design name mode <str>'

Example (CLI)

-datasheet_pin_ground 'mydevice ina ground vss'

Example (API)

chip.set('datasheet','mydevice','pin','ina','ground','global','vss')

Pin related ground rail specified on a per mode basis.

1.3.5.3.7. idrive

Description

Datasheet: drive current

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_idrive 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_idrive 'mydevice sclk global (0.01, 0.012, 0.015)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','idrive','global',(0.01, 0.012, 0.015)

Pin drive current. Values are tuples of (min, typical, max).

1.3.5.3.8. iinject

Description

Datasheet: injection current

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_iinject 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_iinject 'mydevice sclk global (0.001, 0.0012, 0.0015)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','iinject','global',(0.001, 0.0012, 0.0015)

Pin injection current. Values are tuples of (min, typical, max).

1.3.5.3.9. ileakage

Description

Datasheet: leakage current

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_ileakage 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_ileakage 'mydevice sclk global (1e-06, 1.2e-06, 1.5e-06)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','ileakage','global',(1e-06, 1.2e-06, 1.5e-06)

Pin leakage current. Values are tuples of (min, typical, max).

1.3.5.3.10. map

Description

Datasheet: package pin map

Type

str

Default Value

None

CLI Switch

-datasheet_pin_map 'design name package <str>'

Example (CLI)

-datasheet_pin_map 'mydevice in0 bga512 B4'

Example (API)

chip.set('datasheet','mydevice','pin','in0','map','bga512','B4')

Signal to package pin mapping specified on a per package basis.

1.3.5.3.11. rdiff

Description

Datasheet: differential pair resistance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_rdiff 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_rdiff 'mydevice sclk global (45, 50, 55)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','rdiff','global',(45, 50, 55)

Pin differential pair resistance. Values are tuples of (min, typical, max).

1.3.5.3.12. resetvalue

Description

Datasheet: pin reset value

Type

[str]

Default Value

[]

CLI Switch

-datasheet_pin_resetvalue 'design name mode <str>'

Example (CLI)

-datasheet_pin_resetvalue 'mydevice clk global weak1'

Example (API)

chip.set('datasheet','mydevice','pin','clk','resetvalue','global','weak1')

Pin reset value specified on a per mode basis. Legal reset values include weak1, weak0, strong0, strong1, highz.

1.3.5.3.13. rpulldown

Description

Datasheet: pulldown resistance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_rpulldown 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_rpulldown 'mydevice sclk global (1000, 1200, 3000)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','rpulldown','global',(1000, 1200, 3000)

Pin pulldown resistance. Values are tuples of (min, typical, max).

1.3.5.3.14. rpullup

Description

Datasheet: pullup resistance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_rpullup 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_rpullup 'mydevice sclk global (1000, 1200, 3000)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','rpullup','global',(1000, 1200, 3000)

Pin pullup resistance. Values are tuples of (min, typical, max).

1.3.5.3.15. standard

Description

Datasheet: pin standard

Type

[str]

Default Value

[]

CLI Switch

-datasheet_pin_standard 'design name mode <str>'

Example (CLI)

-datasheet_pin_standard 'mydevice ba0 global ddr4'

Example (API)

chip.set('datasheet','mydevice','pin','ina','standard','global','ddr4')

Pin communication standard specified on a per mode basis.

1.3.5.3.16. supply

Description

Datasheet: pin related power supply

Type

str

Default Value

None

CLI Switch

-datasheet_pin_supply 'design name mode <str>'

Example (CLI)

-datasheet_pin_supply 'mydevice ina global vdd'

Example (API)

chip.set('datasheet','mydevice','pin','ina','supply','global','vdd')

Pin related power supply specified on a per mode basis.

1.3.5.3.17. tfall

Description

Datasheet: fall transition

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_tfall 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_tfall 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','tfall','global',(1e-09, 2e-09, 4e-09)

Pin fall transition. Values are tuples of (min, typical, max).

1.3.5.3.18. thold

Description

Datasheet: hold time

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_thold 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_thold 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','thold','global',(1e-09, 2e-09, 4e-09)

Pin hold time. Values are tuples of (min, typical, max).

1.3.5.3.19. tjitter

Description

Datasheet: rms jitter

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_tjitter 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_tjitter 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','tjitter','global',(1e-09, 2e-09, 4e-09)

Pin rms jitter. Values are tuples of (min, typical, max).

1.3.5.3.20. tperiod

Description

Datasheet: minimum period

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_tperiod 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_tperiod 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','tperiod','global',(1e-09, 2e-09, 4e-09)

Pin minimum period. Values are tuples of (min, typical, max).

1.3.5.3.21. tpulse

Description

Datasheet: pulse width

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_tpulse 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_tpulse 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','tpulse','global',(1e-09, 2e-09, 4e-09)

Pin pulse width. Values are tuples of (min, typical, max).

1.3.5.3.22. trise

Description

Datasheet: rise transition

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_trise 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_trise 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','trise','global',(1e-09, 2e-09, 4e-09)

Pin rise transition. Values are tuples of (min, typical, max).

1.3.5.3.23. tsetup

Description

Datasheet: setup time

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_tsetup 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_tsetup 'mydevice sclk global (1e-09, 2e-09, 4e-09)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','tsetup','global',(1e-09, 2e-09, 4e-09)

Pin setup time. Values are tuples of (min, typical, max).

1.3.5.3.24. type

Description

Datasheet: pin type

Type

str

Default Value

None

CLI Switch

-datasheet_pin_type 'design name mode <str>'

Example (CLI)

-datasheet_pin_type 'mydevice vdd type power'

Example (API)

chip.set('datasheet','mydevice','pin','vdd','type','global','power')

Pin type specified on a per mode basis. Acceptable pin types include: digital, analog, clk, power, ground

1.3.5.3.25. vcdm

Description

Datasheet: human body model ESD tolerance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vcdm 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vcdm 'mydevice sclk global (100, 300, 500)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vcdm','global',(100, 300, 500)

Pin human body model ESD tolerance. Values are tuples of (min, typical, max).

1.3.5.3.26. vcm

Description

Datasheet: common mode voltage

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vcm 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vcm 'mydevice sclk global (0.3, 1.2, 1.6)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vcm','global',(0.3, 1.2, 1.6)

Pin common mode voltage. Values are tuples of (min, typical, max).

1.3.5.3.27. vdiff

Description

Datasheet: differential voltage

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vdiff 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vdiff 'mydevice sclk global (0.2, 0.3, 0.9)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vdiff','global',(0.2, 0.3, 0.9)

Pin differential voltage. Values are tuples of (min, typical, max).

1.3.5.3.28. vhbm

Description

Datasheet: machine model ESD tolerance

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vhbm 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vhbm 'mydevice sclk global (100, 300, 500)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vhbm','global',(100, 300, 500)

Pin machine model ESD tolerance. Values are tuples of (min, typical, max).

1.3.5.3.29. vih

Description

Datasheet: high input voltage level

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vih 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vih 'mydevice sclk global (1.4, 1.8, 2.2)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vih','global',(1.4, 1.8, 2.2)

Pin high input voltage level. Values are tuples of (min, typical, max).

1.3.5.3.30. vil

Description

Datasheet: low input voltage level

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vil 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vil 'mydevice sclk global (-0.2, 0, 1.0)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vil','global',(-0.2, 0, 1.0)

Pin low input voltage level. Values are tuples of (min, typical, max).

1.3.5.3.31. vnoise

Description

Datasheet: random voltage noise

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vnoise 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vnoise 'mydevice sclk global (0, 0.01, 0.1)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vnoise','global',(0, 0.01, 0.1)

Pin random voltage noise. Values are tuples of (min, typical, max).

1.3.5.3.32. voh

Description

Datasheet: high output voltage level

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_voh 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_voh 'mydevice sclk global (4.6, 4.8, 5.2)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','voh','global',(4.6, 4.8, 5.2)

Pin high output voltage level. Values are tuples of (min, typical, max).

1.3.5.3.33. vol

Description

Datasheet: low output voltage level

Type

(float,float,float)

Default Value

None

CLI Switch

-datasheet_pin_vol 'design pin mode <(float,float,float)>'

Example (CLI)

-datasheet_pin_vol 'mydevice sclk global (-0.2, 0, 0.2)'

Example (API)

chip.set('datasheet','mydevice','pin','sclk','vol','global',(-0.2, 0, 0.2)

Pin low output voltage level. Values are tuples of (min, typical, max).

1.3.6. design

Description

Design top module name

Type

str

Default Value

None

CLI Switch

-design <str>

Example (CLI)

-design hello_world

Example (API)

chip.set('design', 'hello_world')

Name of the top level module or library. Required for all chip objects.

1.3.7. flowgraph

1.3.7.1. args

Description

Flowgraph: setup arguments

Type

[str]

Default Value

[]

CLI Switch

-flowgraph_args 'flow step index <str>'

Example (CLI)

-flowgraph_args 'asicflow cts 0 0'

Example (API)

chip.add('flowgraph','asicflow','cts','0','args','0')

User specified flowgraph string arguments specified on a per step and per index basis.

1.3.7.2. goal

Description

Flowgraph: metric goals

Type

float

Default Value

None

CLI Switch

-flowgraph_goal 'flow step index metric <float>'

Example (CLI)

-flowgraph_goal 'asicflow cts 0 area_cells 1.0'

Example (API)

chip.set('flowgraph','asicflow','cts','0','goal','errors', 0)

Goals specified on a per step and per metric basis used to determine whether a certain task can be considered when merging multiple tasks at a minimum or maximum node. A task is considered failing if the absolute value of any of its metrics are larger than the goal for that metric, if set.

1.3.7.3. input

Description

Flowgraph: step input

Type

[(str,str)]

Default Value

[]

CLI Switch

-flowgraph_input 'flow step index <(str,str)>'

Example (CLI)

-flowgraph_input 'asicflow cts 0 (place,0)'

Example (API)

chip.set('flowgraph','asicflow','cts','0','input',('place','0'))

A list of inputs for the current step and index, specified as a (step,index) tuple.

1.3.7.4. select

Description

Flowgraph: task select record

Type

[(str,str)]

Default Value

[]

CLI Switch

-flowgraph_select 'flow step index <(str,str)>'

Example (CLI)

-flowgraph_select 'asicflow cts 0 (place,42)'

Example (API)

chip.set('flowgraph','asicflow', 'cts','0','select',('place','42'))

List of selected inputs for the current step/index specified as (in_step,in_index) tuple.

1.3.7.5. status

Description

Flowgraph: task status

Type

str

Default Value

None

CLI Switch

-flowgraph_status 'flow step index <str>'

Example (CLI)

-flowgraph_status 'asicflow cts 10 success'

Example (API)

chip.set('flowgraph','asicflow', 'cts','10','status', 'success')

Parameter that tracks the status of a task. Valid values are:

  • ”success”: task ran successfully

  • ”error”: task failed with an error

An empty value indicates the task has not yet been completed.

1.3.7.6. timeout

Description

Flowgraph: task timeout value

Type

float

Default Value

None

CLI Switch

-flowgraph_timeout 'flow step 0 <float>'

Example (CLI)

-flowgraph_timeout 'asicflow cts 0 3600'

Example (API)

chip.set('flowgraph','asicflow','cts','0','timeout', 3600)

Timeout value in seconds specified on a per step and per index basis. The flowgraph timeout value is compared against the wall time tracked by the SC runtime to determine if an operation should continue. Timeout values help in situations where 1.) an operation is stuck and may never finish. 2.) the operation progress has saturated and continued execution has a negative return on investment.

1.3.7.7. tool

Description

Flowgraph: tool selection

Type

str

Default Value

None

CLI Switch

-flowgraph_tool 'flow step <str>'

Example (CLI)

-flowgraph_tool 'asicflow place 0 openroad'

Example (API)

chip.set('flowgraph','asicflow','place','0','tool','openroad')

Name of the tool name used for task execution. Builtin tool names associated bound to core API functions include: minimum, maximum, join, verify, mux.

1.3.7.8. valid

Description

Flowgraph: task valid bit

Type

bool

Default Value

false

CLI Switch

-flowgraph_valid 'flow step index <str>'

Example (CLI)

-flowgraph_valid 'asicflow cts 0 true'

Example (API)

chip.set('flowgraph','asicflow','cts','0','valid',True)

Flowgraph valid bit specified on a per step and per index basis. The parameter can be used to control flow execution. If the bit is cleared (0), then the step/index combination is invalid and should not be run.

1.3.7.9. weight

Description

Flowgraph: metric weights

Type

float

Default Value

None

CLI Switch

-flowgraph_weight 'flow step index metric <float>'

Example (CLI)

-flowgraph_weight 'asicflow cts 0 area_cells 1.0'

Example (API)

chip.set('flowgraph','asicflow','cts','0','weight','area_cells',1.0)

Weights specified on a per step and per metric basis used to give effective “goodnes” score for a step by calculating the sum all step real metrics results by the corresponding per step weights.

1.3.8. fpga

1.3.8.1. arch

Description

FPGA: architecture file

Type

[file]

Default Value

[]

CLI Switch

-fpga_arch <file>

Example (CLI)

-fpga_arch myfpga.xml

Example (API)

chip.set('fpga', 'arch', 'myfpga.xml')

Architecture definition file for FPGA place and route tool. For the VPR tool, the file is a required XML based description, allowing targeting a large number of virtual and commercial architectures. For most commercial tools, the fpga part name provides enough information to enable compilation and the ‘arch’ parameter is optional.

1.3.8.2. board

Description

FPGA: board name

Type

str

Default Value

None

CLI Switch

-fpga_board <str>

Example (CLI)

-fpga_board parallella

Example (API)

chip.set('fpga', 'board', 'parallella')

Complete board name used as a device target by the FPGA compilation tool. The board name must be an exact string match to the partname hard coded within the FPGA eda tool. The parameter is optional and can be used in place of a partname and pin constraints for some tools.

1.3.8.3. flash

Description

FPGA: flash enable

Type

bool

Default Value

false

CLI Switch

-fpga_flash <bool>

Example (CLI)

-fpga_flash

Example (API)

chip.set('fpga', 'flash', True)

Specifies that the bitstream should be flashed in the board/device. The default is to load the bitstream into volatile memory (SRAM).

1.3.8.4. partname

Description

FPGA: part name

Type

str

Default Value

None

CLI Switch

-fpga_partname <str>

Example (CLI)

-fpga_partname fpga64k

Example (API)

chip.set('fpga', 'partname', 'fpga64k')

Complete part name used as a device target by the FPGA compilation tool. The part name must be an exact string match to the partname hard coded within the FPGA eda tool.

1.3.8.5. program

Description

FPGA: program enable

Type

bool

Default Value

false

CLI Switch

-fpga_program <bool>

Example (CLI)

-fpga_program

Example (API)

chip.set('fpga', 'program', True)

Specifies that the bitstream should be loaded into an FPGA.

1.3.8.6. vendor

Description

FPGA: vendor name

Type

str

Default Value

None

CLI Switch

-fpga_vendor <str>

Example (CLI)

-fpga_vendor acme

Example (API)

chip.set('fpga', 'vendor', 'acme')

Name of the FPGA vendor. The parameter is used to check part name and to select the eda tool flow in case ‘edaflow’ is unspecified.

1.3.9. input

Description

Input files

Type

[file]

Default Value

[]

CLI Switch

-input 'filetype <file>'

Example (CLI)

-input 'verilog hello_world.v'

Example (API)

chip.set(input,'verilog','hello_world.v')

List of input files specifed by type. The filetype name must align with the parameter names within the flow and tool setup scripts. Examples of acceptable file types include python, c, systemc, verilog, vhdl, netlist, def, gds, gerber, saif, sdc, saif, vcd, spef, sdf.

1.3.10. metric

1.3.10.1. averagepower

Description

Metric: averagepower

Type

float

Default Value

None

CLI Switch

-metric_averagepower 'step index <float>'

Example (CLI)

-metric_averagepower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','averagepower', 0.01)

Metric tracking the average workload power of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power averagepower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.2. brams

Description

Metric: FPGA BRAM tiles

Type

int

Default Value

None

CLI Switch

-metric_brams 'step index <int>'

Example (CLI)

-metric_brams 'place 0 100'

Example (API)

chip.set('metric','place','0','brams', 100)

Metric tracking the total FPGA BRAM tiles used by the design as reported by the implementation tool. There is no standardized definition for this metric across vendors, so metric comparisons can generally only be done between runs on identical tools and device families.

1.3.10.3. buffers

Description

Metric: buffers

Type

int

Default Value

None

CLI Switch

-metric_buffers 'step index <float>'

Example (CLI)

-metric_buffers 'place 0 100'

Example (API)

chip.set('metric','place','0','buffers', 50)

Metric tracking the total number of buffer and inverter instances in the design on a per step and index basis.

1.3.10.4. cellarea

Description

Metric: cellarea

Type

float

Default Value

None

CLI Switch

-metric_cellarea 'step index <float>'

Example (CLI)

-metric_cellarea 'place 0 100.00'

Example (API)

chip.set('metric','place','0','cellarea', 100.00)

Metric tracking the total cell area (ignoring fillers) occupied by the design.

1.3.10.5. cells

Description

Metric: cells

Type

int

Default Value

None

CLI Switch

-metric_cells 'step index <float>'

Example (CLI)

-metric_cells 'place 0 100'

Example (API)

chip.set('metric','place','0','cells', 50)

Metric tracking the total number of cell instances in the design on a per step and index basis.

1.3.10.6. coverage

Description

Metric: coverage

Type

float

Default Value

None

CLI Switch

-metric_coverage 'step index <float>'

Example (CLI)

-metric_coverage 'place 0 99.9'

Example (API)

chip.set('metric','place','0','coverage', 99.9)

Metric tracking the test coverage in the design expressed as a percentage with 100 meaning full coverage. The meaning of the metric depends on the task being executed. It can refer to code coverage, feature coverage, stuck at fault coverage.

1.3.10.7. dozepower

Description

Metric: dozepower

Type

float

Default Value

None

CLI Switch

-metric_dozepower 'step index <float>'

Example (CLI)

-metric_dozepower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','dozepower', 0.01)

Metric tracking the power consumed while in low frequency operating mode of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power dozepower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.8. drvs

Description

Metric: total drvs

Type

int

Default Value

None

CLI Switch

-metric_drvs 'step index <int>'

Example (CLI)

-metric_drvs 'dfm 0 0'

Example (API)

chip.set('metric','dfm','0','drvs', 0)

Metric tracking the total number of design rule violations on a per step and index basis.

1.3.10.9. dsps

Description

Metric: FPGA DSP slices

Type

int

Default Value

None

CLI Switch

-metric_dsps 'step index <int>'

Example (CLI)

-metric_dsps 'place 0 100'

Example (API)

chip.set('metric','place','0','dsps', 100)

Metric tracking the total FPGA DSP slices used by the design as reported by the implementation tool. There is no standardized definition for this metric across vendors, so metric comparisons can generally only be done between runs on identical tools and device families.

1.3.10.10. errors

Description

Metric: total errors

Type

int

Default Value

None

CLI Switch

-metric_errors 'step index <int>'

Example (CLI)

-metric_errors 'dfm 0 0'

Example (API)

chip.set('metric','dfm','0','errors', 0)

Metric tracking the total number of errors on a per step and index basis.

1.3.10.11. exetime

Description

Metric: exetime

Type

float

Default Value

None

CLI Switch

-metric_exetime 'step index <float>'

Example (CLI)

-metric_exetime 'dfm 0 10.0'

Example (API)

chip.set('metric','dfm','0','exetime', 10.0)

Metric tracking time spent by the eda executable ‘exe’ on a per step and index basis. It does not include the siliconcompiler runtime overhead or time waitig for I/O operations and inter-processor communication to complete.

1.3.10.12. holdpaths

Description

Metric: holdpaths

Type

int

Default Value

None

CLI Switch

-metric_holdpaths 'step index <float>'

Example (CLI)

-metric_holdpaths 'place 0 10'

Example (API)

chip.set('metric','place','0','holdpaths', 10)

Metric tracking the total number of timing paths violating hold constraints.

1.3.10.13. holdslack

Description

Metric: holdslack

Type

float

Default Value

None

CLI Switch

-metric_holdslack 'step index <float>'

Example (CLI)

-metric_holdslack 'place 0 0.01'

Example (API)

chip.set('metric','place','0','holdslack', 0.01)

Metric tracking the worst hold slack (positive or negative) on a per step and index basis.

1.3.10.14. holdtns

Description

Metric: holdtns

Type

float

Default Value

None

CLI Switch

-metric_holdtns 'step index <float>'

Example (CLI)

-metric_holdtns 'place 0 0.01'

Example (API)

chip.set('metric','place','0','holdtns', 0.01)

Metric tracking the total negative hold slack (TNS) on a per step and index basis.

1.3.10.15. holdwns

Description

Metric: holdwns

Type

float

Default Value

None

CLI Switch

-metric_holdwns 'step index <float>'

Example (CLI)

-metric_holdwns 'place 0 0.01'

Example (API)

chip.set('metric','place','0','holdwns', 0.01)

Metric tracking the worst negative hold slack (positive values truncated to zero) on a per step and index basis.

1.3.10.16. idlepower

Description

Metric: idlepower

Type

float

Default Value

None

CLI Switch

-metric_idlepower 'step index <float>'

Example (CLI)

-metric_idlepower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','idlepower', 0.01)

Metric tracking the power while not performing useful work of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power idlepower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.17. irdrop

Description

Metric: peak IR drop

Type

float

Default Value

None

CLI Switch

-metric_irdrop 'step index <float>'

Example (CLI)

-metric_irdrop 'place 0 0.05'

Example (API)

chip.set('metric','place','0','irdrop', 0.05)

Metric tracking the peak IR drop in the design based on extracted power and ground rail parasitics, library power models, and switching activity. The switching activity calculated on a per node basis is taken from one of three possible sources, in order of priority: VCD file, SAIF file, ‘activityfactor’ parameter.

1.3.10.18. leakagepower

Description

Metric: leakagepower

Type

float

Default Value

None

CLI Switch

-metric_leakagepower 'step index <float>'

Example (CLI)

-metric_leakagepower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','leakagepower', 0.01)

Metric tracking the leakage power with rails active but without any dynamic switching activity of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power leakagepower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.19. luts

Description

Metric: FPGA LUTs

Type

int

Default Value

None

CLI Switch

-metric_luts 'step index <int>'

Example (CLI)

-metric_luts 'place 0 100'

Example (API)

chip.set('metric','place','0','luts', 100)

Metric tracking the total FPGA LUTs used by the design as reported by the implementation tool. There is no standardized definition for this metric across vendors, so metric comparisons can generally only be done between runs on identical tools and device families.

1.3.10.20. macros

Description

Metric: macros

Type

int

Default Value

None

CLI Switch

-metric_macros 'step index <float>'

Example (CLI)

-metric_macros 'place 0 100'

Example (API)

chip.set('metric','place','0','macros', 50)

Metric tracking the total number of macros in the design on a per step and index basis.

1.3.10.21. memory

Description

Metric: memory

Type

float

Default Value

None

CLI Switch

-metric_memory 'step index <float>'

Example (CLI)

-metric_memory 'dfm 0 10e9'

Example (API)

chip.set('metric','dfm','0','memory', 10e9)

Metric tracking total peak program memory footprint on a per step and index basis.

1.3.10.22. nets

Description

Metric: nets

Type

int

Default Value

None

CLI Switch

-metric_nets 'step index <float>'

Example (CLI)

-metric_nets 'place 0 100'

Example (API)

chip.set('metric','place','0','nets', 50)

Metric tracking the total number of nets in the design on a per step and index basis.

1.3.10.23. overflow

Description

Metric: overflow

Type

int

Default Value

None

CLI Switch

-metric_overflow 'step index <float>'

Example (CLI)

-metric_overflow 'place 0 0'

Example (API)

chip.set('metric','place','0','overflow', 50)

Metric tracking the total number of overflow tracks for the routing on per step and index basis. Any non-zero number suggests an over congested design. To analyze where the congestion is occurring inspect the router log files for detailed per metal overflow reporting and open up the design to find routing hotspots.

1.3.10.24. peakpower

Description

Metric: peakpower

Type

float

Default Value

None

CLI Switch

-metric_peakpower 'step index <float>'

Example (CLI)

-metric_peakpower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','peakpower', 0.01)

Metric tracking the worst case total peak power of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power peakpower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.25. pins

Description

Metric: pins

Type

int

Default Value

None

CLI Switch

-metric_pins 'step index <float>'

Example (CLI)

-metric_pins 'place 0 100'

Example (API)

chip.set('metric','place','0','pins', 50)

Metric tracking the total number of pins in the design on a per step and index basis.

1.3.10.26. registers

Description

Metric: registers

Type

int

Default Value

None

CLI Switch

-metric_registers 'step index <float>'

Example (CLI)

-metric_registers 'place 0 100'

Example (API)

chip.set('metric','place','0','registers', 50)

Metric tracking the total number of register instances in the design on a per step and index basis.

1.3.10.27. security

Description

Metric: security

Type

float

Default Value

None

CLI Switch

-metric_security 'step index <float>'

Example (CLI)

-metric_security 'place 0 100'

Example (API)

chip.set('metric','place','0','security', 100)

Metric tracking the level of security (1/vulnerability) of the design. A completely secure design would have a score of 100. There is no absolute scale for the security metrics (like with power, area, etc) so the metric will be task and tool dependent.

1.3.10.28. setuppaths

Description

Metric: setuppaths

Type

int

Default Value

None

CLI Switch

-metric_setuppaths 'step index <float>'

Example (CLI)

-metric_setuppaths 'place 0 10'

Example (API)

chip.set('metric','place','0','setuppaths', 10)

Metric tracking the total number of timing paths violating setup constraints.

1.3.10.29. setupslack

Description

Metric: setupslack

Type

float

Default Value

None

CLI Switch

-metric_setupslack 'step index <float>'

Example (CLI)

-metric_setupslack 'place 0 0.01'

Example (API)

chip.set('metric','place','0','setupslack', 0.01)

Metric tracking the worst setup slack (positive or negative) on a per step and index basis.

1.3.10.30. setuptns

Description

Metric: setuptns

Type

float

Default Value

None

CLI Switch

-metric_setuptns 'step index <float>'

Example (CLI)

-metric_setuptns 'place 0 0.01'

Example (API)

chip.set('metric','place','0','setuptns', 0.01)

Metric tracking the total negative setup slack (TNS) on a per step and index basis.

1.3.10.31. setupwns

Description

Metric: setupwns

Type

float

Default Value

None

CLI Switch

-metric_setupwns 'step index <float>'

Example (CLI)

-metric_setupwns 'place 0 0.01'

Example (API)

chip.set('metric','place','0','setupwns', 0.01)

Metric tracking the worst negative setup slack (positive values truncated to zero) on a per step and index basis.

1.3.10.32. sleeppower

Description

Metric: sleeppower

Type

float

Default Value

None

CLI Switch

-metric_sleeppower 'step index <float>'

Example (CLI)

-metric_sleeppower 'place 0 0.01'

Example (API)

chip.set('metric','place','0','sleeppower', 0.01)

Metric tracking the power consumed with some or all power rails gated off of the design specified on a per step and index basis. Power metric depend heavily on the method being used for extraction: dynamic vs static, workload specification (vcd vs saif), power models, process/voltage/temperature. The power sleeppower metric tries to capture the data that would usually be reflected inside a datasheet given the approprate footnote conditions.

1.3.10.33. tasktime

Description

Metric: tasktime

Type

float

Default Value

None

CLI Switch

-metric_tasktime 'step index <float>'

Example (CLI)

-metric_tasktime 'dfm 0 10.0'

Example (API)

chip.set('metric','dfm','0','tasktime', 10.0)

Metric trakcing the total amount of time spent on a task from beginning to end, including data transfers and pre/post processing.

1.3.10.34. totalarea

Description

Metric: totalarea

Type

float

Default Value

None

CLI Switch

-metric_totalarea 'step index <float>'

Example (CLI)

-metric_totalarea 'place 0 100.00'

Example (API)

chip.set('metric','place','0','totalarea', 100.00)

Metric tracking the total physical die area occupied by the design.

1.3.10.35. totaltime

Description

Metric: totaltime

Type

float

Default Value

None

CLI Switch

-metric_totaltime 'step index <float>'

Example (CLI)

-metric_totaltime 'dfm 0 10.0'

Example (API)

chip.set('metric','dfm','0','totaltime', 10.0)

Metric tracking the total amount of time spent from the beginning of the run up to and including the current step and index.

1.3.10.36. transistors

Description

Metric: transistors

Type

int

Default Value

None

CLI Switch

-metric_transistors 'step index <float>'

Example (CLI)

-metric_transistors 'place 0 100'

Example (API)

chip.set('metric','place','0','transistors', 50)

Metric tracking the total number of transistors in the design on a per step and index basis.

1.3.10.37. unconstrained

Description

Metric: total unconstrained

Type

int

Default Value

None

CLI Switch

-metric_unconstrained 'step index <int>'

Example (CLI)

-metric_unconstrained 'dfm 0 0'

Example (API)

chip.set('metric','dfm','0','unconstrained', 0)

Metric tracking the total number of unconstrained timing paths on a per step and index basis.

1.3.10.38. utilization

Description

Metric: area utilization

Type

float

Default Value

None

CLI Switch

-metric_utilization step index <float>

Example (CLI)

-metric_utilization 'place 0 50.00'

Example (API)

chip.set('metric','place','0','utilization', 50.00)

Metric tracking the area utilization of the design calculated as 100 * (cellarea/totalarea).

1.3.10.39. vias

Description

Metric: vias

Type

int

Default Value

None

CLI Switch

-metric_vias 'step index <float>'

Example (CLI)

-metric_vias 'place 0 100'

Example (API)

chip.set('metric','place','0','vias', 50)

Metric tracking the total number of vias in the design on a per step and index basis.

1.3.10.40. warnings

Description

Metric: total warnings

Type

int

Default Value

None

CLI Switch

-metric_warnings 'step index <int>'

Example (CLI)

-metric_warnings 'dfm 0 0'

Example (API)

chip.set('metric','dfm','0','warnings', 0)

Metric tracking the total number of warnings on a per step and index basis.

1.3.10.41. wirelength

Description

Metric: wirelength

Type

float

Default Value

None

CLI Switch

-metric_wirelength 'step index <float>'

Example (CLI)

-metric_wirelength 'place 0 100.0'

Example (API)

chip.set('metric','place','0','wirelength', 50.0)

Metric tracking the total wirelength of the design on a per step and index basis.

1.3.11. model

1.3.11.1. formal

Description

Model: Formal

Type

[file]

Default Value

[]

CLI Switch

-model_formal 'filetype <file>'

Example (CLI)

-model_formal 'smv adder.smv'

Example (API)

chip.set('model','formal','smv','adder.smv')

Filepaths to formal models specified on a per filetype basis.

1.3.11.2. functional

Description

Model: Functional

Type

[file]

Default Value

[]

CLI Switch

-model_functional 'filetype <file>'

Example (CLI)

-model_functional 'systemc adder.sc'

Example (API)

chip.set('model','functional','systemc','adder.sc')

Filepaths to (fast) functional models specified on a per filetype basis.

1.3.11.3. io

Description

Model: IO

Type

[file]

Default Value

[]

CLI Switch

-model_io 'filetype <file>'

Example (CLI)

-model_io 'ibis top.ibs'

Example (API)

chip.set('model','io','ibis','top.ibis')

Filepaths to IO models specified on a per filetype basis.

1.3.11.4. layout

Description

Model: Layout

Type

[file]

Default Value

[]

CLI Switch

-model_layout 'filetype stackup <file>'

Example (CLI)

-model_layout 'lef 10M adder.lef'

Example (API)

chip.set('model','layout','lef','10M','adder.lef')

Filepaths to abstract layout views specified on a per filetype and per stackup basis.

1.3.11.5. power

Description

Model: Power

Type

[file]

Default Value

[]

CLI Switch

-model_power 'filetype corner <file>'

Example (CLI)

-model_power 'apl ss adder.ss.apl'

Example (API)

chip.set('model','power','apl','ss','adder.ss.apl')

Filepaths to power/current models.

1.3.11.6. rtl

Description

Model: RTL

Type

[file]

Default Value

[]

CLI Switch

-model_rtl 'filetype <file>'

Example (CLI)

-model_rtl 'systemc adder.sc'

Example (API)

chip.set('model','rtl','systemc','adder.sc')

Filepaths to cycle accurate model specified on a per filetype basis.

1.3.11.7. thermal

Description

Model: Thermal

Type

[file]

Default Value

[]

CLI Switch

-model_thermal 'filetype corner <file>'

Example (CLI)

-model_thermal 'delphi adder_thermal.sp'

Example (API)

chip.set('model','thermal','delphi','adder_thermal.sp')

Filepaths to thermal models.

1.3.11.8. timing

Description

Model: Timing

Type

[file]

Default Value

[]

CLI Switch

-model_timing 'filetype corner <file>'

Example (CLI)

-model_timing 'nldm-libgz ss ss.lib.gz'

Example (API)

chip.set('model','timing','nldm-ldb','ss','ss.ldb')

Filepaths to static timing models specified on a per filetype and per corner basis. Examples of filetypes include: nldm, nldm-ldb, nldm-libgz, ccs, ccs-libgz, ccs-ldb, scm, scm-libgz, scm-ldb, aocv, aocv-libgz, aocv-ldb.

1.3.12. option

1.3.12.1. autoinstall

Description

Option: auto install packages

Type

bool

Default Value

false

CLI Switch

-autoinstall <bool>

Example (CLI)

-autoinstall true'

Example (API)

chip.set('option', 'autoinstall', True)

Enables automatic installation of missing dependencies from the registry.

1.3.12.2. bkpt

Description

Breakpoint list

Type

[str]

Default Value

[]

CLI Switch

-bkpt <str>

Example (CLI)

-bkpt place

Example (API)

chip.set('option,'bkpt','place')

List of step stop (break) points. If the step is a TCL based tool, then the breakpoints stops the flow inside the EDA tool. If the step is a command line tool, then the flow drops into a Python interpreter.

1.3.12.3. builddir

Description

Build directory

Type

dir

Default Value

build

CLI Switch

-builddir <dir>

Example (CLI)

-builddir ./build_the_future

Example (API)

chip.set('option', 'builddir','./build_the_future')

The default build directory is in the local ‘./build’ where SC was executed. The ‘builddir’ parameter can be used to set an alternate compilation directory path.

1.3.12.4. cfg

Description

Configuration manifest

Type

[file]

Default Value

[]

CLI Switch

-cfg <file>

Example (CLI)

-cfg mypdk.json

Example (API)

chip.set('option','cfg','mypdk.json')

List of filepaths to JSON formatted schema configuration manifests. The files are read in automatically when using the ‘sc’ command line application. In Python programs, JSON manifests can be merged into the current working manifest using the read_manifest() method.

1.3.12.5. clean

Description

Clean up after run

Type

bool

Default Value

false

CLI Switch

-clean <bool>

Example (CLI)

-clean

Example (API)

chip.set('option','clean',True)

Clean up all intermediate and non essential files at the end of a task, leaving the following:

  • log file

  • replay.sh

  • inputs/

  • outputs/

  • reports/

  • autogenerated manifests

  • any files generated by schema-specified regexes

  • files specified by ['tool', <tool>, 'keep', ...]

1.3.12.6. cmdfile

Description

Design compilation command file

Type

[file]

Default Value

[]

CLI Switch

-f <file>

Example (CLI)

-f design.f

Example (API)

chip.set('option', 'cmdfile','design.f')

Read the specified file, and act as if all text inside it was specified as command line parameters. Supported by most verilog simulators including Icarus and Verilator. The format of the file is not strongly standardized. Support for comments and environment variables within the file varies and depends on the tool used. SC simply passes on the filepath toe the tool executable.

1.3.12.7. copyall

Description

Copy all inputs to build directory

Type

bool

Default Value

false

CLI Switch

-copyall <bool>

Example (CLI)

-copyall

Example (API)

chip.set('option','copyall',True)

Specifies that all used files should be copied into the build directory, overriding the per schema entry copy settings.

1.3.12.8. credentials

Description

User credentials file

Type

[file]

Default Value

[]

CLI Switch

-credentials <file>'

Example (CLI)

-credentials /home/user/.sc/credentials

Example (API)

chip.set('option', 'credentials','/home/user/.sc/credentials')

Filepath to credentials used for remote processing. If the credentials parameter is empty, the remote processing client program tries to access the “.sc/credentials” file in the user’s home directory. The file supports the following fields:

userid=<user id> secret_key=<secret key used for authentication> server=<ipaddr or url>

1.3.12.9. define

Description

Design pre-processor symbol

Type

[str]

Default Value

[]

CLI Switch

-D<str>

Example (CLI)

-DCFG_ASIC=1

Example (API)

chip.set('option','define','CFG_ASIC=1')

Symbol definition for source preprocessor.

1.3.12.10. entrypoint

Description

Program entry point

Type

str

Default Value

None

CLI Switch

-entrypoint <str>

Example (CLI)

-entrypoint top

Example (API)

chip.set('option', 'entrypoint', 'top')

Alternative entrypoint for compilation and simulation. The default entry point is ‘design’.

1.3.12.11. env

Description

Environment variables

Type

str

Default Value

None

CLI Switch

-env 'key <str>

Example (CLI)

-env 'PDK_HOME /disk/mypdk'

Example (API)

chip.set('option','env', 'PDK_HOME', '/disk/mypdk')

Certain tools and reference flows require global environment variables to be set. These variables can be managed externally or specified through the env variable.

1.3.12.12. flow

Description

Flow target

Type

str

Default Value

None

CLI Switch

-flow <str>

Example (CLI)

-flow asicfow

Example (API)

chip.set('option','flow','asicflow')

Sets the flow for the current run. The flow name must match up with a ‘flow’ in the flowgraph

1.3.12.13. frontend

Description

Compilation frontend

Type

str

Default Value

verilog

CLI Switch

-frontend <frontend>

Example (CLI)

-frontend systemverilog

Example (API)

chip.set('option','frontend', 'systemverilog')

Specifies the frontend that flows should use for importing and processing source files. Default option is ‘verilog’, also supports ‘systemverilog’ and ‘chisel’. When using the Python API, this parameter must be configured before calling load_target().

1.3.12.14. hash

Description

Enable file hashing

Type

bool

Default Value

false

CLI Switch

-hash <bool>

Example (CLI)

-hash

Example (API)

chip.set('option','hash',True)

Enables hashing of all inputs and outputs during compilation. The hash values are stored in the hashvalue field of the individual parameters.

1.3.12.15. idir

Description

Design search paths

Type

[dir]

Default Value

[]

CLI Switch

['+incdir+<dir>', '-I <dir>']

Example (CLI)

+incdir+./mylib

Example (API)

chip.set('option','idir','./mylib')

Search paths to look for files included in the design using the `include statement.

1.3.12.16. indexlist

Description

Compilation index list

Type

[str]

Default Value

[]

CLI Switch

-indexlist <index>

Example (CLI)

-indexlist 0

Example (API)

chip.set('option','indexlist','0')

List of indices to execute. The default is to execute all indices for each step of a run.

1.3.12.17. jobincr

Description

Autoincrement jobname

Type

bool

Default Value

false

CLI Switch

-jobincr <bool>

Example (CLI)

-jobincr

Example (API)

chip.set('option','jobincr',True)

Forces an auto-update of the jobname parameter if a directory matching the jobname is found in the build directory. If the jobname does not include a trailing digit, then a the number ‘1’ is added to the jobname before updating the jobname parameter.

1.3.12.18. jobinput

Description

Input job name

Type

str

Default Value

None

CLI Switch

-jobinput 'step index <str>'

Example (CLI)

-jobinput 'cts 0 job0'

Example (API)

chip.set('option','jobinput','cts,'0','job0')

Specifies jobname inputs for the current run() on a per step and per index basis. During execution, the default behavior is to copy inputs from the current job.

1.3.12.19. jobname

Description

Job name

Type

str

Default Value

job0

CLI Switch

-jobname <str>

Example (CLI)

-jobname may1

Example (API)

chip.set('option','jobname','may1')

Jobname during invocation of run(). The jobname combined with a defined director structure (<dir>/<design>/<jobname>/<step>/<index>) enables multiple levels of transparent job, step, and index introspection.

1.3.12.20. jobscheduler

Description

Job scheduler name

Type

str

Default Value

None

CLI Switch

-jobscheduler <str>

Example (CLI)

-jobscheduler slurm

Example (API)

chip.set('option','jobscheduler','slurm')

Sets the type of job scheduler to be used for each individual flowgraph steps. If the parameter is undefined, the steps are executed on the same machine that the SC was launched on. If ‘slurm’ is used, the host running the ‘sc’ command must be running a ‘slurmctld’ daemon managing a Slurm cluster. Additionally, the build directory (‘-dir’) must be located in shared storage which can be accessed by all hosts in the cluster.

1.3.12.21. libext

Description

Design file extensions

Type

[str]

Default Value

[]

CLI Switch

+libext+<str>

Example (CLI)

+libext+sv

Example (API)

chip.set('option','libext','sv')

List of file extensions that should be used for finding modules. For example, if -y is specified as ./lib”, and ‘.v’ is specified as libext then the files ./lib/*.v “, will be searched for module matches.

1.3.12.22. loglevel

Description

Logging level

Type

str

Default Value

INFO

CLI Switch

-loglevel <str>

Example (CLI)

-loglevel INFO

Example (API)

chip.set('option', 'loglevel', 'INFO')

Provides explicit control over the level of debug logging printed. Valid entries include INFO, DEBUG, WARNING, ERROR.

1.3.12.23. metricoff

Description

Metric summary filter

Type

[str]

Default Value

[]

CLI Switch

-metricoff '<str>'

Example (CLI)

-metricoff 'wirelength'

Example (API)

chip.set('option','metricoff','wirelength')

List of metrics to supress when printing out the run summary.

1.3.12.24. mode

Description

Compilation mode

Type

str

Default Value

None

CLI Switch

-mode <str>

Example (CLI)

-mode asic

Example (API)

chip.set('option','mode','asic')

Sets the operating mode of the compiler. Valid modes are: asic: RTL to GDS ASIC compilation fpga: RTL to bitstream FPGA compilation sim: simulation to verify design and compilation

1.3.12.25. msgcontact

Description

Message contact

Type

[str]

Default Value

[]

CLI Switch

-msgcontact <str>

Example (CLI)

-msgcontact 'wile.e.coyote@acme.com'

Example (API)

chip.set('option','msgcontact','wiley@acme.com')

A list of phone numbers or email addresses to message on a event event within the msg_event param. Actual support for email and phone messages is platform dependent.

1.3.12.26. msgevent

Description

Message event trigger

Type

[str]

Default Value

[]

CLI Switch

-msgevent <str>

Example (CLI)

-msgevent export

Example (API)

chip.set('option','msgevent','export')

A list of steps after which to notify a recipient. For example if values of syn, place, cts are entered separate messages would be sent after the completion of the syn, place, and cts steps.

1.3.12.27. nodisplay

Description

Headless execution

Type

bool

Default Value

false

CLI Switch

-nodisplay <bool>

Example (CLI)

-nodisplay

Example (API)

chip.set('option','nodisplay',True)

The ‘-nodisplay’ flag prevents SiliconCompiler from opening GUI windows such as the final metrics report.

1.3.12.28. novercheck

Description

Disable version checking

Type

bool

Default Value

false

CLI Switch

-novercheck <bool>

Example (CLI)

-novercheck

Example (API)

chip.set('option','novercheck',True)

Disables strict version checking on all invoked tools if True. The list of supported version numbers is defined in the ‘version’ parameter in the ‘eda’ dictionary for each tool.

1.3.12.29. optmode

Description

Optimization mode

Type

str

Default Value

O0

CLI Switch

-O<str>

Example (CLI)

-O3

Example (API)

chip.set('option','optmode','O3')

The compiler has modes to prioritize run time and ppa. Modes include.

(O0) = Exploration mode for debugging setup (O1) = Higher effort and better PPA than O0 (O2) = Higher effort and better PPA than O1 (O3) = Signoff quality. Better PPA and higher run times than O2 (O4-O98) = Reserved (compiler/target dependent) (O99) = Experimental highest possible effort, may be unstable

1.3.12.30. param

Description

Design parameter

Type

str

Default Value

None

CLI Switch

-param 'name <str>'

Example (CLI)

-param 'N 64'

Example (API)

chip.set('option','param','N','64')

Sets a top verilog level design module parameter. The value is limited to basic data literals. The parameter override is passed into tools such as Verilator and Yosys. The parameters support Verilog integer literals (64’h4, 2’b0, 4) and strings. Name of the top level module to compile.

1.3.12.31. pdk

Description

PDK target

Type

str

Default Value

None

CLI Switch

-pdk <str>

Example (CLI)

-pdk asap7

Example (API)

chip.set('option','pdk','asap7')

Sets the pdk for the current run. The pdk name must match up with a ‘pdk’ loaded with load_pdk.

1.3.12.32. quiet

Description

Quiet execution

Type

bool

Default Value

false

CLI Switch

-quiet <bool>

Example (CLI)

-quiet

Example (API)

chip.set('option','quiet',True)

The -quiet option forces all steps to print to a log file. This can be useful with Modern EDA tools which print significant content to the screen.

1.3.12.33. registry

Description

Option: package registry

Type

[dir]

Default Value

[]

CLI Switch

-registry <dir>

Example (CLI)

-registry '~/myregistry'

Example (API)

chip.set('option','registry','~/myregistry')

List of Silicon Unified Packager (SUP) registry directories. Directories can be local file system folders or publicly available registries served up over http. The naming convention for registry packages is: <name>/<name>-<version>.json(.<gz>)?

1.3.12.34. relax

Description

Relax RTL linting

Type

bool

Default Value

false

CLI Switch

-relax <bool>

Example (CLI)

-relax

Example (API)

chip.set('option','relax',True)

Specifies that tools should be lenient and suppress some warnings that may or may not indicate design issues.

1.3.12.35. remote

Description

Enable remote processing

Type

bool

Default Value

false

CLI Switch

-remote <bool>

Example (CLI)

-remote

Example (API)

chip.set('option','remote', True)

Sends job for remote processing if set to true. The remote option requires a credentials file to be placed in the home directory. Fore more information, see the credentials parameter.

1.3.12.36. resume

Description

Resume build

Type

bool

Default Value

false

CLI Switch

-resume <bool>

Example (CLI)

-resume

Example (API)

chip.set('option','resume',True)

If results exist for current job, then don’t re-run any steps that had at least one index run successfully. Useful for debugging a flow that failed partway through.

1.3.12.37. scpath

Description

Search path

Type

[dir]

Default Value

[]

CLI Switch

-scpath <dir>

Example (CLI)

-scpath '/home/$USER/sclib'

Example (API)

chip.set('option', 'scpath','/home/$USER/sclib')

Specifies python modules paths for target import.

1.3.12.38. show

Description

Show layout

Type

bool

Default Value

false

CLI Switch

-show <bool>

Example (CLI)

-show

Example (API)

chip.set('option','show',True)

Specifies that the final hardware layout should be shown after the compilation has been completed. The final layout and tool used to display the layout is flow dependent.

1.3.12.39. showtool

Description

Select data display tool

Type

str

Default Value

None

CLI Switch

-showtool 'filetype <tool>'

Example (CLI)

-showtool 'gds klayout'

Example (API)

chip.set('option','showtool','gds','klayout')

Selects the tool to use by the show function for displaying the specified filetype.

1.3.12.40. skipall

Description

Skip all tasks

Type

bool

Default Value

false

CLI Switch

-skipall <bool>

Example (CLI)

-skipall

Example (API)

chip.set('option','skipall',True)

Skips the execution of all tools in run(), enabling a quick check of tool and setup without having to run through each step of a flow to completion.

1.3.12.41. skipcheck

Description

Skip manifest check

Type

bool

Default Value

false

CLI Switch

-skipcheck <bool>

Example (CLI)

-skipcheck

Example (API)

chip.set('option','skipcheck',True)

Bypasses the strict runtime manifest check. Can be used for accelerating initial bringup of tool/flow/pdk/libs targets. The flag should not be used for production compilation.

1.3.12.42. skipstep

Description

Skip step list

Type

[str]

Default Value

[]

CLI Switch

-skipstep <str>

Example (CLI)

-skipstep lvs

Example (API)

chip.set('option','skipstep','lvs')

List of steps to skip during execution.The default is to execute all steps defined in the flow graph.

1.3.12.43. steplist

Description

Compilation step list

Type

[str]

Default Value

[]

CLI Switch

-steplist <step>

Example (CLI)

-steplist 'import'

Example (API)

chip.set('option','steplist','import')

List of steps to execute. The default is to execute all steps defined in the flow graph.

1.3.12.44. target

Description

Compilation target

Type

str

Default Value

None

CLI Switch

-target <str>

Example (CLI)

-target freepdk45_demo

Example (API)

chip.set('option','target','freepdk45_demo')

Sets a target module to be used for compilation. The target module must set up all paramaters needed. The target module may load multiple flows and libraries.

1.3.12.45. trace

Description

Enable debug traces

Type

bool

Default Value

false

CLI Switch

-trace <bool>

Example (CLI)

-trace

Example (API)

chip.set('option','trace',True)

Enables debug tracing during compilation and/or runtime.

1.3.12.46. track

Description

Enable provenance tracking

Type

bool

Default Value

false

CLI Switch

-track <bool>

Example (CLI)

-track

Example (API)

chip.set('option','track',True)

Turns on tracking of all ‘record’ parameters during each task. Tracking will result in potentially sensitive data being recorded in the manifest so only turn on this feature if you have control of the final manifest.

1.3.12.47. vlib

Description

Design libraries

Type

[file]

Default Value

[]

CLI Switch

-v <file>

Example (CLI)

-v './mylib.v'

Example (API)

chip.set('option', 'vlib','./mylib.v')

List of library files to be read in. Modules found in the libraries are not interpreted as root modules.

1.3.12.48. ydir

Description

Design module search paths

Type

[dir]

Default Value

[]

CLI Switch

-y <dir>

Example (CLI)

-y './mylib'

Example (API)

chip.set('option','ydir','./mylib')

Search paths to look for verilog modules found in the the source list. The import engine will look for modules inside files with the specified +libext+ param suffix.

1.3.13. output

Description

Output files

Type

[file]

Default Value

[]

CLI Switch

-output 'filetype <file>'

Example (CLI)

-output 'verilog hello_world.v'

Example (API)

chip.set(output,'verilog','hello_world.v')

List of output files specifed by type. The filetype name must align with the parameter names within the flow and tool setup scripts. Examples of acceptable file types include python, c, systemc, verilog, vhdl, netlist, def, gds, gerber, saif, sdc, saif, vcd, spef, sdf.

1.3.14. package

1.3.14.1. author

1.3.14.1.1. email

Description

Package: author email

Type

str

Default Value

None

CLI Switch

-package_author_email 'userid <str>'

Example (CLI)

-package_author_email 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','email','wiley@acme.com')

Package author email provided with full name as key and email as value.

1.3.14.1.2. location

Description

Package: author location

Type

str

Default Value

None

CLI Switch

-package_author_location 'userid <str>'

Example (CLI)

-package_author_location 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','location','wiley@acme.com')

Package author location provided with full name as key and location as value.

1.3.14.1.3. name

Description

Package: author name

Type

str

Default Value

None

CLI Switch

-package_author_name 'userid <str>'

Example (CLI)

-package_author_name 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','name','wiley@acme.com')

Package author name provided with full name as key and name as value.

1.3.14.1.4. organization

Description

Package: author organization

Type

str

Default Value

None

CLI Switch

-package_author_organization 'userid <str>'

Example (CLI)

-package_author_organization 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','organization','wiley@acme.com')

Package author organization provided with full name as key and organization as value.

1.3.14.1.5. publickey

Description

Package: author publickey

Type

str

Default Value

None

CLI Switch

-package_author_publickey 'userid <str>'

Example (CLI)

-package_author_publickey 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','publickey','wiley@acme.com')

Package author publickey provided with full name as key and publickey as value.

1.3.14.1.6. username

Description

Package: author username

Type

str

Default Value

None

CLI Switch

-package_author_username 'userid <str>'

Example (CLI)

-package_author_username 'wiley wiley@acme.com'

Example (API)

chip.set('package','author','wiley','username','wiley@acme.com')

Package author username provided with full name as key and username as value.

1.3.14.2. dependency

Description

Package: version dependancies

Type

[str]

Default Value

[]

CLI Switch

-package_dependency 'module <str>'

Example (CLI)

-package_dependency 'hello 1.0'

Example (API)

chip.set('package','dependency','hello','1.0')

Package dependencies specified as a key value pair. Versions shall follow the semver standard.

1.3.14.3. depgraph

Description

Package dependency list

Type

[(str,str)]

Default Value

[]

CLI Switch

-package_depgraph 'module <(str,str)>'

Example (CLI)

-package_depgraph 'top (cpu,1.0.1)'

Example (API)

chip.set('package','depgraph','top',('cpu','1.0.1'))

List of Silicon Unified Packager (SUP) dependencies used by the design specified on a per module basis a list of string tuples (‘name’,’version’).

1.3.14.4. description

Description

Package: description

Type

str

Default Value

None

CLI Switch

-package_description <str>

Example (CLI)

-package_description 'Yet another cpu'

Example (API)

chip.set('package','description','Yet another cpu')

Package short one line description for package managers and summary reports.

1.3.14.5. doc

1.3.14.5.1. datasheet

Description

Package: datasheet document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_datasheet <str

Example (CLI)

-package_doc_datasheet datasheet.pdf

Example (API)

chip.set('package','doc',datasheet,'datasheet.pdf')

Package list of datasheet documents.

1.3.14.5.2. homepage

Description

Package: documentation homepage

Type

str

Default Value

None

CLI Switch

-package_doc_homepage <str>

Example (CLI)

-package_doc_homepage index.html

Example (API)

chip.set('package','doc', 'homepage','index.html')

Package documentation homepage. Filepath to design docs homepage. Complex designs can can include a long non standard list of documents dependent. A single html entry point can be used to present an organized documentation dashboard to the designer.

1.3.14.5.3. quickstart

Description

Package: quickstart document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_quickstart <str

Example (CLI)

-package_doc_quickstart quickstart.pdf

Example (API)

chip.set('package','doc',quickstart,'quickstart.pdf')

Package list of quickstart documents.

1.3.14.5.4. reference

Description

Package: reference document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_reference <str

Example (CLI)

-package_doc_reference reference.pdf

Example (API)

chip.set('package','doc',reference,'reference.pdf')

Package list of reference documents.

1.3.14.5.5. releasenotes

Description

Package: releasenotes document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_releasenotes <str

Example (CLI)

-package_doc_releasenotes releasenotes.pdf

Example (API)

chip.set('package','doc',releasenotes,'releasenotes.pdf')

Package list of releasenotes documents.

1.3.14.5.6. signoff

Description

Package: signoff document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_signoff <str

Example (CLI)

-package_doc_signoff signoff.pdf

Example (API)

chip.set('package','doc',signoff,'signoff.pdf')

Package list of signoff documents.

1.3.14.5.7. testplan

Description

Package: testplan document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_testplan <str

Example (CLI)

-package_doc_testplan testplan.pdf

Example (API)

chip.set('package','doc',testplan,'testplan.pdf')

Package list of testplan documents.

1.3.14.5.8. tutorial

Description

Package: tutorial document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_tutorial <str

Example (CLI)

-package_doc_tutorial tutorial.pdf

Example (API)

chip.set('package','doc',tutorial,'tutorial.pdf')

Package list of tutorial documents.

1.3.14.5.9. userguide

Description

Package: userguide document

Type

[file]

Default Value

[]

CLI Switch

-package_doc_userguide <str

Example (CLI)

-package_doc_userguide userguide.pdf

Example (API)

chip.set('package','doc',userguide,'userguide.pdf')

Package list of userguide documents.

1.3.14.6. homepage

Description

Package: project homepage

Type

str

Default Value

None

CLI Switch

-package_homepage <str>

Example (CLI)

-package_homepage index.html

Example (API)

chip.set('package','homepage','index.html')

Package homepage.

1.3.14.7. keyword

Description

Package: keyword

Type

str

Default Value

None

CLI Switch

-package_keyword <str>

Example (CLI)

-package_keyword cpu

Example (API)

chip.set('package','keyword','cpu')

Package keyword(s) used to characterize package.

1.3.14.8. license

Description

Package: license identifiers

Type

[str]

Default Value

[]

CLI Switch

-package_license <str>

Example (CLI)

-package_license 'Apache-2.0'

Example (API)

chip.set('package','license','Apache-2.0')

Package list of SPDX license identifiers.

1.3.14.9. licensefile

Description

Package: license files

Type

[file]

Default Value

[]

CLI Switch

-package_licensefile <file>

Example (CLI)

-package_licensefile './LICENSE'

Example (API)

chip.set('package','licensefile','./LICENSE')

Package list of license files for to be applied in cases when a SPDX identifier is not available. (eg. proprietary licenses).list of SPDX license identifiers.

1.3.14.10. location

Description

Package: location

Type

[str]

Default Value

[]

CLI Switch

-package_location <file>

Example (CLI)

-package_location 'mars'

Example (API)

chip.set('package','location','mars')

Package country of origin specified as standardized international country codes. The field can be left blank if the location is unknown or global.

1.3.14.11. name

Description

Package: name

Type

str

Default Value

None

CLI Switch

-package_name <str>

Example (CLI)

-package_name yac

Example (API)

chip.set('package','name','yac')

Package name.

1.3.14.12. organization

Description

Package: sponsoring organization

Type

[str]

Default Value

[]

CLI Switch

-package_organization <str>

Example (CLI)

-package_organization 'humanity'

Example (API)

chip.set('package','organization','humanity')

Package sponsoring organization. The field can be left blank if not applicable.

1.3.14.13. publickey

Description

Package: public key

Type

str

Default Value

None

CLI Switch

-package_publickey <str>

Example (CLI)

-package_publickey '6EB695706EB69570'

Example (API)

chip.set('package','publickey','6EB695706EB69570')

Package public project key.

1.3.14.14. repo

Description

Package: code repository

Type

[str]

Default Value

[]

CLI Switch

-package_repo <str>

Example (CLI)

-package_repo 'git@github.com:aolofsson/oh.git'

Example (API)

chip.set('package','repo','git@github.com:aolofsson/oh.git')

Package IP address to source code repository.

1.3.14.15. target

Description

Package: qualified targets

Type

[str]

Default Value

[]

CLI Switch

-package_target <str>

Example (CLI)

-package_target 'asicflow_freepdk45'

Example (API)

chip.set('package','target','asicflow_freepdk45')

Package list of qualified compilation targets.

1.3.14.16. version

Description

Package: version

Type

str

Default Value

None

CLI Switch

-package_version <str>

Example (CLI)

-package_version 1.0

Example (API)

chip.set('package','version','1.0')

Package version. Can be a branch, tag, commit hash, or a semver compatible version.

1.3.15. pdk

1.3.15.1. aprtech

Description

PDK: APR technology files

Type

[file]

Default Value

[]

CLI Switch

-pdk_aprtech 'pdkname tool stackup libarch filetype <file>'

Example (CLI)

-pdk_aprtech 'asap7 openroad M10 12t lef tech.lef'

Example (API)

chip.set('pdk','asap7','aprtech','openroad','M10','12t','lef','tech.lef')

Technology file containing setup information needed to enable DRC clean APR for the specified stackup, libarch, and format. The ‘libarch’ specifies the library architecture (e.g. library height). For example a PDK with support for 9 and 12 track libraries might have ‘libarchs’ called 9t and 12t. The standard filetype for specifying place and route design rules for a process node is through a ‘lef’ format technology file. The ‘filetype’ used in the aprtech is used by the tool specific APR TCL scripts to set up the technology parameters. Some tools may require additional files beyond the tech.lef file. Examples of extra file types include antenna, tracks, tapcell, viarules, em.

1.3.15.2. d0

Description

PDK: process defect density

Type

float

Default Value

None

CLI Switch

-pdk_d0 'pdkname <float>'

Example (CLI)

-pdk_d0 'asap7 0.1'

Example (API)

chip.set('pdk', 'asap7', 'd0', 0.1)

Process defect density (d0) expressed as random defects per cm^2. The value is used to calculate yield losses as a function of area, which in turn affects the chip full factory costs. Two yield models are supported: Poisson (default), and Murphy. The Poisson based yield is calculated as dy = exp(-area * d0/100). The Murphy based yield is calculated as dy = ((1-exp(-area * d0/100))/(area * d0/100))^2.

1.3.15.3. density

Description

PDK: transistor density

Type

float

Default Value

None

CLI Switch

-pdk_density 'pdkname <float>'

Example (CLI)

-pdk_density 'asap7 100e6'

Example (API)

chip.set('pdk', 'asap7', 'density', 10e6)

Approximate logic density expressed as # transistors / mm^2 calculated as: 0.6 * (Nand2 Transistor Count) / (Nand2 Cell Area) + 0.4 * (Register Transistor Count) / (Register Cell Area) The value is specified for a fixed standard cell library within a node and will differ depending on the library vendor, library track height and library type. The value can be used to to normalize the effective density reported for the design across different process nodes. The value can be derived from a variety of sources, including the PDK DRM, library LEFs, conference presentations, and public analysis.

1.3.15.4. devmodel

Description

PDK: device models

Type

[file]

Default Value

[]

CLI Switch

-pdk_devmodel 'pdkname tool simtype stackup <file>'

Example (CLI)

-pdk_devmodel 'asap7 xyce spice M10 asap7.sp'

Example (API)

chip.set('pdk','asap7','devmodel','xyce','spice','M10','asap7.sp')

List of filepaths to PDK device models for different simulation purposes and for different tools. Examples of device model types include spice, aging, electromigration, radiation. An example of a ‘spice’ tool is xyce. Device models are specified on a per metal stack basis. Process nodes with a single device model across all stacks will have a unique parameter record per metal stack pointing to the same device model file. Device types and tools are dynamic entries that depend on the tool setup and device technology. Pseud-standardized device types include spice, em (electromigration), and aging.

1.3.15.5. directory

Description

PDK: special directory

Type

[dir]

Default Value

[]

CLI Switch

-pdk_directory 'pdkname tool key stackup <file>'

Example (CLI)

-pdk_directory 'asap7 xyce rfmodel M10 rftechdir'

Example (API)

chip.set('pdk','asap7','directory','xyce','rfmodel','M10','rftechdir')

List of named directories specified on a per tool and per stackup basis. The parameter should only be used for specifying files that are not directly supported by the SiliconCompiler PDK schema.

1.3.15.6. display

Description

PDK: display file

Type

[file]

Default Value

[]

CLI Switch

-pdk_display 'pdkname tool stackup <file>'

Example (CLI)

-pdk_display 'asap7 klayout M10 display.lyt'

Example (API)

chip.set('pdk','asap7','display','klayout','M10','display.cfg')

Display configuration files describing colors and pattern schemes for all layers in the PDK. The display configuration file is entered on a stackup and tool basis.

1.3.15.7. doc

1.3.15.7.1. datasheet

Description

PDK: datasheet

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_datasheet 'pdkname <file>'

Example (CLI)

-pdk_doc_datasheet 'asap7 datasheet.pdf'

Example (API)

chip.set('pdk','asap7','doc',datasheet,'datasheet.pdf')

Filepath to datasheet document.

1.3.15.7.2. homepage

Description

PDK: documentation homepage

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_homepage 'pdkname <file>'

Example (CLI)

-pdk_doc_homepage 'asap7 index.html'

Example (API)

chip.set('pdk','asap7','doc','homepage','index.html')

Filepath to PDK docs homepage. Modern PDKs can include tens or hundreds of individual documents. A single html entry point can be used to present an organized documentation dashboard to the designer.

1.3.15.7.3. install

Description

PDK: install

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_install 'pdkname <file>'

Example (CLI)

-pdk_doc_install 'asap7 install.pdf'

Example (API)

chip.set('pdk','asap7','doc',install,'install.pdf')

Filepath to install document.

1.3.15.7.4. quickstart

Description

PDK: quickstart

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_quickstart 'pdkname <file>'

Example (CLI)

-pdk_doc_quickstart 'asap7 quickstart.pdf'

Example (API)

chip.set('pdk','asap7','doc',quickstart,'quickstart.pdf')

Filepath to quickstart document.

1.3.15.7.5. reference

Description

PDK: reference

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_reference 'pdkname <file>'

Example (CLI)

-pdk_doc_reference 'asap7 reference.pdf'

Example (API)

chip.set('pdk','asap7','doc',reference,'reference.pdf')

Filepath to reference document.

1.3.15.7.6. releasenotes

Description

PDK: releasenotes

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_releasenotes 'pdkname <file>'

Example (CLI)

-pdk_doc_releasenotes 'asap7 releasenotes.pdf'

Example (API)

chip.set('pdk','asap7','doc',releasenotes,'releasenotes.pdf')

Filepath to releasenotes document.

1.3.15.7.7. tutorial

Description

PDK: tutorial

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_tutorial 'pdkname <file>'

Example (CLI)

-pdk_doc_tutorial 'asap7 tutorial.pdf'

Example (API)

chip.set('pdk','asap7','doc',tutorial,'tutorial.pdf')

Filepath to tutorial document.

1.3.15.7.8. userguide

Description

PDK: userguide

Type

[file]

Default Value

[]

CLI Switch

-pdk_doc_userguide 'pdkname <file>'

Example (CLI)

-pdk_doc_userguide 'asap7 userguide.pdf'

Example (API)

chip.set('pdk','asap7','doc',userguide,'userguide.pdf')

Filepath to userguide document.

1.3.15.8. drc

1.3.15.8.1. runset

Description

PDK: DRC runset files

Type

[file]

Default Value

[]

CLI Switch

-pdk_drc_runset 'pdkname tool stackup name <file>'

Example (CLI)

-pdk_drc_runset 'asap7 magic M10 basic $PDK/drc.rs'

Example (API)

chip.set('pdk', 'asap7','drc','runset','magic','M10','basic','$PDK/drc.rs')

Runset files for DRC task.

1.3.15.8.2. waiver

Description

PDK: DRC waiver files

Type

[file]

Default Value

[]

CLI Switch

-pdk_drc_waiver 'tool stackup name <file>'

Example (CLI)

-pdk_drc_waiver 'asap7 magic M10 basic $PDK/drc.txt'

Example (API)

chip.set('pdk', 'asap7','drc','waiver','magic','M10','basic','$PDK/drc.txt')

Waiver files for DRC task.

1.3.15.9. edgemargin

Description

PDK: wafer edge keep-out margin

Type

float

Default Value

None

CLI Switch

-pdk_edgemargin 'pdkname <float>'

Example (CLI)

-pdk_edgemargin 'asap7 1'

Example (API)

chip.set('pdk', 'asap7', 'edgemargin', 1)

Keep-out distance/margin from the edge inwards. The edge is prone to chipping and need special treatment that preclude placement of designs in this area. The edge value is used to calculate effective units per wafer/panel and full factory cost.

1.3.15.10. erc

1.3.15.10.1. runset

Description

PDK: ERC runset files

Type

[file]

Default Value

[]

CLI Switch

-pdk_erc_runset 'pdkname tool stackup name <file>'

Example (CLI)

-pdk_erc_runset 'asap7 magic M10 basic $PDK/erc.rs'

Example (API)

chip.set('pdk', 'asap7','erc','runset','magic','M10','basic','$PDK/erc.rs')

Runset files for ERC task.

1.3.15.10.2. waiver

Description

PDK: ERC waiver files

Type

[file]

Default Value

[]

CLI Switch

-pdk_erc_waiver 'tool stackup name <file>'

Example (CLI)

-pdk_erc_waiver 'asap7 magic M10 basic $PDK/erc.txt'

Example (API)

chip.set('pdk', 'asap7','erc','waiver','magic','M10','basic','$PDK/erc.txt')

Waiver files for ERC task.

1.3.15.11. file

Description

PDK: special file

Type

[file]

Default Value

[]

CLI Switch

-pdk_file 'pdkname tool key stackup <file>'

Example (CLI)

-pdk_file 'asap7 xyce spice M10 asap7.sp'

Example (API)

chip.set('pdk','asap7','file','xyce','spice','M10','asap7.sp')

List of named files specified on a per tool and per stackup basis. The parameter should only be used for specifying files that are not directly supported by the SiliconCompiler PDK schema.

1.3.15.12. fill

1.3.15.12.1. runset

Description

PDK: FILL runset files

Type

[file]

Default Value

[]

CLI Switch

-pdk_fill_runset 'pdkname tool stackup name <file>'

Example (CLI)

-pdk_fill_runset 'asap7 magic M10 basic $PDK/fill.rs'

Example (API)

chip.set('pdk', 'asap7','fill','runset','magic','M10','basic','$PDK/fill.rs')

Runset files for FILL task.

1.3.15.12.2. waiver

Description

PDK: FILL waiver files

Type

[file]

Default Value

[]

CLI Switch

-pdk_fill_waiver 'tool stackup name <file>'

Example (CLI)

-pdk_fill_waiver 'asap7 magic M10 basic $PDK/fill.txt'

Example (API)

chip.set('pdk', 'asap7','fill','waiver','magic','M10','basic','$PDK/fill.txt')

Waiver files for FILL task.

1.3.15.13. foundry

Description

PDK: foundry name

Type

str

Default Value

None

CLI Switch

-pdk_foundry 'pdkname <str>'

Example (CLI)

-pdk_foundry 'asap7 virtual'

Example (API)

chip.set('pdk', 'asap7', 'foundry', 'virtual')

Name of foundry corporation. Examples include intel, gf, tsmc, samsung, skywater, virtual. The ‘virtual’ keyword is reserved for simulated non-manufacturable processes.

1.3.15.14. grid

1.3.15.14.1. adj

Description

PDK: routing grid resource adjustment

Type

float

Default Value

None

CLI Switch

-pdk_grid_adj 'pdkname stackup layer <float>'

Example (CLI)

-pdk_grid_adj 'asap7 M10 m2 0.5'

Example (API)

chip.set('pdk','asap7','grid','M10','m2','adj','0.5')

Defines the routing resources adjustments for the design on a per layer basis. The value is expressed as a fraction from 0 to 1. A value of 0.5 reduces the routing resources by 50%. If not defined, 100% routing resource utilization is permitted.

1.3.15.14.2. cap

Description

PDK: routing grid unit capacitance

Type

float

Default Value

None

CLI Switch

-pdk_grid_cap 'pdkname stackup layer corner <float>''

Example (CLI)

-pdk_grid_cap 'asap7 M10 m2 fast 0.2'

Example (API)

chip.set('pdk','asap7','grid','M10','m2','cap','fast','0.2')

Unit capacitance of a wire defined by the grid width and spacing values in the ‘grid’ structure specified on a per stackup, metal, and corner basis. As a rough rule of thumb, this value tends to stay around 0.2ff/um. This number should only be used for reality confirmation. Accurate analysis should use the PEX models.

1.3.15.14.3. dir

Description

PDK: routing grid preferred direction

Type

str

Default Value

None

CLI Switch

-pdk_grid_dir 'pdkname stackup layer <str>'

Example (CLI)

-pdk_grid_dir 'asap7 M10 m1 horizontal'

Example (API)

chip.set('pdk','asap7','grid','M10','m1','dir','horizontal')

Preferred routing direction specified on a per stackup and per metal basis. Valid routing directions are horizontal and vertical.

1.3.15.14.4. name

Description

PDK: routing grid name map

Type

str

Default Value

None

CLI Switch

-pdk_grid_name 'pdkname stackup layer <str>'

Example (CLI)

-pdk_grid_name 'asap7 M10 metal1 m1'

Example (API)

chip.set('pdk','asap7','grid','M10','metal1','name','m1')

Maps PDK metal names to the SC standardized layer stack starting with m1 as the lowest routing layer and ending with m<n> as the highest routing layer. The map is specified on a per metal stack basis.

1.3.15.14.5. res

Description

PDK: routing grid unit resistance

Type

float

Default Value

None

CLI Switch

-pdk_grid_res 'pdkname stackup layer corner <float>''

Example (CLI)

-pdk_grid_res 'asap7 M10 m2 fast 0.2'

Example (API)

chip.set('pdk','asap7','grid','M10','m2','res','fast','0.2')

Resistance of a wire defined by the grid width and spacing values in the ‘grid’ structure specified as ohms/um on a per stackup, metal, and corner basis. The parameter is only meant to be used as a sanity check and for coarse design planning. Accurate analysis should use the TCAD PEX models.

1.3.15.14.6. tcr

Description

PDK: routing grid temperature coefficient

Type

float

Default Value

None

CLI Switch

-pdk_grid_tcr 'pdkname stackup layer corner <float>'

Example (CLI)

-pdk_grid_tcr 'asap7 M10 m2 fast 0.2'

Example (API)

chip.set('pdk','asap7','grid','M10','m2','tcr','fast','0.2')

Temperature coefficient of resistance of the wire defined by the grid width and spacing values in the ‘grid’ structure on a per stackup, layer, and corner basis. The number is only meant to be used as a sanity check and for coarse design planning. Accurate analysis should use the PEX models.

1.3.15.14.7. xoffset

Description

PDK: routing grid vertical wire offset

Type

float

Default Value

None

CLI Switch

-pdk_grid_xoffset 'pdkname stackup layer <float>'

Example (CLI)

-pdk_grid_xoffset 'asap7 M10 m2 0.5'

Example (API)

chip.set('pdk','asap7','grid','M10','m2','xoffset','0.5')

Defines the grid offset of a vertical metal layer specified on a per stackup and per metal basis.

1.3.15.14.8. xpitch

Description

PDK: routing grid vertical wire pitch

Type

float

Default Value

None

CLI Switch

-pdk_grid_xpitch 'pdkname stackup layer <float>'

Example (CLI)

-pdk_grid_xpitch 'asap7 M10 m1 0.5'

Example (API)

chip.set('pdk', 'asap7','grid','M10','m1','xpitch','0.5')

Defines the routing pitch for vertical wires on a per stackup and per metal basis.

1.3.15.14.9. yoffset

Description

PDK: routing grid horizontal wire offset

Type

float

Default Value

None

CLI Switch

-pdk_grid_yoffset 'pdkname stackup layer <float>'

Example (CLI)

-pdk_grid_yoffset 'asap7 M10 m2 0.5'

Example (API)

chip.set('pdk', 'asap7','grid','M10','m2','yoffset','0.5')

Defines the grid offset of a horizontal metal layer specified on a per stackup and per metal basis.

1.3.15.14.10. ypitch

Description

PDK: routing grid horizontal wire pitch

Type

float

Default Value

None

CLI Switch

-pdk_grid_ypitch 'pdkname stackup layer <float>'

Example (CLI)

-pdk_grid_ypitch 'asap7 M10 m1 0.5'

Example (API)

chip.set('pdk','asap7','grid','M10','m1','ypitch','0.5')

Defines the routing pitch for horizontal wires on a per stackup and per metal basis.

1.3.15.15. hscribe

Description

PDK: horizontal scribe line width

Type

float

Default Value

None

CLI Switch

-pdk_hscribe 'pdkname <float>'

Example (CLI)

-pdk_hscribe 'asap7 0.1'

Example (API)

chip.set('pdk', 'asap7', 'hscribe', 0.1)

Width of the horizontal scribe line used during die separation. The process is generally completed using a mechanical saw, but can be done through combinations of mechanical saws, lasers, wafer thinning, and chemical etching in more advanced technologies. The value is used to calculate effective dies per wafer and full factory cost.

1.3.15.16. layermap

Description

PDK: layer map file

Type

[file]

Default Value

[]

CLI Switch

-pdk_layermap 'pdkname tool src dst stackup <file>'

Example (CLI)

-pdk_layermap 'asap7 klayout db gds M10 asap7.map'

Example (API)

chip.set('pdk','asap7','layermap','klayout','db','gds','M10','asap7.map')

Files describing input/output mapping for streaming layout data from one format to another. A foundry PDK will include an official layer list for all user entered and generated layers supported in the GDS accepted by the foundry for processing, but there is no standardized layer definition format that can be read and written by all EDA tools. To ensure mask layer matching, key/value type mapping files are needed to convert EDA databases to/from GDS and to convert between different types of EDA databases. Layer maps are specified on a per metal stackup basis. The ‘src’ and ‘dst’ can be names of SC supported tools or file formats (like ‘gds’).

1.3.15.17. lvs

1.3.15.17.1. runset

Description

PDK: LVS runset files

Type

[file]

Default Value

[]

CLI Switch

-pdk_lvs_runset 'pdkname tool stackup name <file>'

Example (CLI)

-pdk_lvs_runset 'asap7 magic M10 basic $PDK/lvs.rs'

Example (API)

chip.set('pdk', 'asap7','lvs','runset','magic','M10','basic','$PDK/lvs.rs')

Runset files for LVS task.

1.3.15.17.2. waiver

Description

PDK: LVS waiver files

Type

[file]

Default Value

[]

CLI Switch

-pdk_lvs_waiver 'tool stackup name <file>'

Example (CLI)

-pdk_lvs_waiver 'asap7 magic M10 basic $PDK/lvs.txt'

Example (API)

chip.set('pdk', 'asap7','lvs','waiver','magic','M10','basic','$PDK/lvs.txt')

Waiver files for LVS task.

1.3.15.18. node

Description

PDK: process node

Type

float

Default Value

None

CLI Switch

-pdk_node 'pdkname <float>'

Example (CLI)

-pdk_node 'asap7 130'

Example (API)

chip.set('pdk', 'asap7', 'node', 130)

Approximate relative minimum dimension of the process target specified in nanometers. The parameter is required for flows and tools that leverage the value to drive technology dependent synthesis and APR optimization. Node examples include 180, 130, 90, 65, 45, 32, 22 14, 10, 7, 5, 3.

1.3.15.19. panelsize

Description

PDK: panel size

Type

[(float,float)]

Default Value

[]

CLI Switch

-pdk_panelsize 'pdkname <float>'

Example (CLI)

-pdk_panelsize 'asap7 (45.72,60.96)'

Example (API)

chip.set('pdk', 'asap7', 'panelsize', (45.72,60.96))

List of panel sizes supported in the manufacturing process.

1.3.15.20. pexmodel

Description

PDK: parasitic TCAD models

Type

[file]

Default Value

[]

CLI Switch

-pdk_pexmodel 'pdkname tool stackup corner <file>'

Example (CLI)

-pdk_pexmodel 'asap7 fastcap M10 max wire.mod'

Example (API)

chip.set('pdk','asap7','pexmodel','fastcap','M10','max','wire.mod')

List of filepaths to PDK wire TCAD models used during automated synthesis, APR, and signoff verification. Pexmodels are specified on a per metal stack basis. Corner values depend on the process being used, but typically include nomenclature such as min, max, nominal. For exact names, refer to the DRM. Pexmodels are generally not standardized and specified on a per tool basis. An example of pexmodel type is ‘fastcap’.

1.3.15.21. stackup

Description

PDK: metal stackups

Type

[str]

Default Value

[]

CLI Switch

-pdk_stackup 'pdkname <str>'

Example (CLI)

-pdk_stackup 'asap7 2MA4MB2MC'

Example (API)

chip.add('pdk', 'asap7','stackup','2MA4MB2MC')

List of all metal stackups offered in the process node. Older process nodes may only offer a single metal stackup, while advanced nodes offer a large but finite list of metal stacks with varying combinations of metal line pitches and thicknesses. Stackup naming is unique to a foundry, but is generally a long string or code. For example, a 10 metal stackup with two 1x wide, four 2x wide, and 4x wide metals, might be identified as 2MA4MB2MC, where MA, MB, and MC denote wiring layers with different properties (thickness, width, space). Each stackup will come with its own set of routing technology files and parasitic models specified in the pdk_pexmodel and pdk_aprtech parameters.

1.3.15.22. thickness

Description

PDK: unit thickness

Type

float

Default Value

None

CLI Switch

-pdk_thickness 'pdkname stackup <float>'

Example (CLI)

-pdk_thickness 'asap7 2MA4MB2MC 1.57'

Example (API)

chip.set('pdk', 'asap7', 'thickness', '2MA4MB2MC', 1.57)

Thickness of a manfuatured unit specified on a per stackup basis.

1.3.15.23. unitcost

Description

PDK: unit cost

Type

float

Default Value

None

CLI Switch

-pdk_unitcost 'pdkname <float>'

Example (CLI)

-pdk_unitcost 'asap7 10000'

Example (API)

chip.set('pdk', 'asap7', 'unitcost', 10000)

Raw cost per unit shipped by the factory, not accounting for yield loss.

1.3.15.24. var

Description

PDK: special variable

Type

[str]

Default Value

[]

CLI Switch

-pdk_var 'pdkname tool stackup key <str>'

Example (CLI)

-pdk_var 'asap7 xyce modeltype M10 bsim4'

Example (API)

chip.set('pdk','asap7','var','xyce','modeltype','M10','bsim4')

List of key/value strings specified on a per tool and per stackup basis. The parameter should only be used for specifying variables that are not directly supported by the SiliconCompiler PDK schema.

1.3.15.25. version

Description

PDK: version

Type

str

Default Value

None

CLI Switch

-pdk_version 'pdkname <str>'

Example (CLI)

-pdk_version 'asap7 1.0'

Example (API)

chip.set('pdk', 'asap7', 'version', '1.0')

Alphanumeric string specifying the version of the PDK. Verification of correct PDK and IP versions is a hard ASIC tapeout require in all commercial foundries. The version number can be used for design manifest tracking and tapeout checklists.

1.3.15.26. vscribe

Description

PDK: vertical scribe line width

Type

float

Default Value

None

CLI Switch

-pdk_vscribe 'pdkname <float>'

Example (CLI)

-pdk_vscribe 'asap7 0.1'

Example (API)

chip.set('pdk', 'asap7', 'vscribe', 0.1)

Width of the vertical scribe line used during die separation.

The process is generally completed using a mechanical saw, but can be done through combinations of mechanical saws, lasers, wafer thinning, and chemical etching in more advanced technologies. The value is used to calculate effective dies per wafer and full factory cost.

1.3.15.27. wafersize

Description

PDK: wafer size

Type

float

Default Value

None

CLI Switch

-pdk_wafersize 'pdkname <float>'

Example (CLI)

-pdk_wafersize 'asap7 300'

Example (API)

chip.set('pdk', 'asap7', 'wafersize', 300)

Wafer diameter used in wafer based manufacturing process. The standard diameter for leading edge manufacturing is 300mm. For older process technologies and specialty fabs, smaller diameters such as 200, 100, 125, 100 are common. The value is used to calculate dies per wafer and full factory chip costs.

1.3.16. record

1.3.16.1. arch

Description

Record: hardware architecture

Type

str

Default Value

None

CLI Switch

-record_arch 'step index <str>'

Example (CLI)

-record_arch 'dfm 0 <x86_64>'

Example (API)

chip.set('record','dfm','0','arch', <x86_64>)

Record tracking the hardware architecture per step and index basis. (x86_64, rv64imafdc)

1.3.16.2. distro

Description

Record: distro name

Type

str

Default Value

None

CLI Switch

-record_distro 'step index <str>'

Example (CLI)

-record_distro 'dfm 0 <ubuntu>'

Example (API)

chip.set('record','dfm','0','distro', <ubuntu>)

Record tracking the distro name per step and index basis. (ubuntu, redhat, centos)

1.3.16.3. endtime

Description

Record: end time

Type

str

Default Value

None

CLI Switch

-record_endtime 'step index <str>'

Example (CLI)

-record_endtime 'dfm 0 <2021-09-06 12:20:20>'

Example (API)

chip.set('record','dfm','0','endtime', <2021-09-06 12:20:20>)

Record tracking the end time per step and index basis. Time is reported in the ISO 8601 format YYYY-MM-DD HR:MIN:SEC

1.3.16.4. ipaddr

Description

Record: IP address

Type

str

Default Value

None

CLI Switch

-record_ipaddr 'step index <str>'

Example (CLI)

-record_ipaddr 'dfm 0 <<addr>>'

Example (API)

chip.set('record','dfm','0','ipaddr', <<addr>>)

Record tracking the IP address per step and index basis.

1.3.16.5. kernelversion

Description

Record: O/S kernel version

Type

str

Default Value

None

CLI Switch

-record_kernelversion 'step index <str>'

Example (CLI)

-record_kernelversion 'dfm 0 <5.11.0-34-generic>'

Example (API)

chip.set('record','dfm','0','kernelversion', <5.11.0-34-generic>)

Record tracking the O/S kernel version per step and index basis. Used for platforms that support a distinction between os kernels and os distributions.

1.3.16.6. macaddr

Description

Record: MAC address

Type

str

Default Value

None

CLI Switch

-record_macaddr 'step index <str>'

Example (CLI)

-record_macaddr 'dfm 0 <<addr>>'

Example (API)

chip.set('record','dfm','0','macaddr', <<addr>>)

Record tracking the MAC address per step and index basis.

1.3.16.7. machine

Description

Record: machine name

Type

str

Default Value

None

CLI Switch

-record_machine 'step index <str>'

Example (CLI)

-record_machine 'dfm 0 <carbon>'

Example (API)

chip.set('record','dfm','0','machine', <carbon>)

Record tracking the machine name per step and index basis. (myhost, localhost, …

1.3.16.8. osversion

Description

Record: O/S version

Type

str

Default Value

None

CLI Switch

-record_osversion 'step index <str>'

Example (CLI)

-record_osversion 'dfm 0 <20.04.1-Ubuntu>'

Example (API)

chip.set('record','dfm','0','osversion', <20.04.1-Ubuntu>)

Record tracking the O/S version per step and index basis. Since there is not standard version system for operating systems, extracting information from is platform dependent. For Linux based operating systems, the ‘osversion’ is the version of the distro.

1.3.16.9. platform

Description

Record: platform name

Type

str

Default Value

None

CLI Switch

-record_platform 'step index <str>'

Example (CLI)

-record_platform 'dfm 0 <linux>'

Example (API)

chip.set('record','dfm','0','platform', <linux>)

Record tracking the platform name per step and index basis. (linux, windows, freebsd)

1.3.16.10. publickey

Description

Record: public key

Type

str

Default Value

None

CLI Switch

-record_publickey 'step index <str>'

Example (CLI)

-record_publickey 'dfm 0 <<key>>'

Example (API)

chip.set('record','dfm','0','publickey', <<key>>)

Record tracking the public key per step and index basis.

1.3.16.11. region

Description

Record: cloud region

Type

str

Default Value

None

CLI Switch

-record_region 'step index <str>'

Example (CLI)

-record_region 'dfm 0 <US Gov Boston>'

Example (API)

chip.set('record','dfm','0','region', <US Gov Boston>)

Record tracking the cloud region per step and index basis. Recommended naming methodology:

  • local: node is the local machine

  • onprem: node in on-premises IT infrastructure

  • public: generic public cloud

  • govcloud: generic US government cloud

  • <region>: cloud and entity specific region string name

1.3.16.12. scversion

Description

Record: software version

Type

str

Default Value

None

CLI Switch

-record_scversion 'step index <str>'

Example (CLI)

-record_scversion 'dfm 0 <1.0>'

Example (API)

chip.set('record','dfm','0','scversion', <1.0>)

Record tracking the software version per step and index basis. Version number for the SiliconCompiler software.

1.3.16.13. starttime

Description

Record: start time

Type

str

Default Value

None

CLI Switch

-record_starttime 'step index <str>'

Example (CLI)

-record_starttime 'dfm 0 <2021-09-06 12:20:20>'

Example (API)

chip.set('record','dfm','0','starttime', <2021-09-06 12:20:20>)

Record tracking the start time per step and index basis. Time is reported in the ISO 8601 format YYYY-MM-DD HR:MIN:SEC

1.3.16.14. toolpath

Description

Record: tool path

Type

str

Default Value

None

CLI Switch

-record_toolpath 'step index <str>'

Example (CLI)

-record_toolpath 'dfm 0 </usr/bin/openroad>'

Example (API)

chip.set('record','dfm','0','toolpath', </usr/bin/openroad>)

Record tracking the tool path per step and index basis. Full path to tool executable used to run this task.

1.3.16.15. toolversion

Description

Record: tool version

Type

str

Default Value

None

CLI Switch

-record_toolversion 'step index <str>'

Example (CLI)

-record_toolversion 'dfm 0 <1.0>'

Example (API)

chip.set('record','dfm','0','toolversion', <1.0>)

Record tracking the tool version per step and index basis. The tool version captured correspnds to the ‘tool’ parameter within the ‘eda’ dictionary.

1.3.16.16. userid

Description

Record: userid

Type

str

Default Value

None

CLI Switch

-record_userid 'step index <str>'

Example (CLI)

-record_userid 'dfm 0 <wiley>'

Example (API)

chip.set('record','dfm','0','userid', <wiley>)

Record tracking the userid per step and index basis.

1.3.17. schemaversion

Description

Schema version number

Type

str

Default Value

0.8.0

CLI Switch

-schemaversion <str>

Example (API)

chip.get('schemaversion')

SiliconCompiler schema version number.

1.3.18. tool

1.3.18.1. continue

Description

Tool: continue-on-error option

Type

bool

Default Value

false

CLI Switch

-tool_continue 'tool <bool>'

Example (CLI)

-tool_continue 'verilator true'

Example (API)

chip.set('tool','verilator','continue', true)

Directs tool to continue operating even if errors are encountered.

1.3.18.2. env

Description

Tool: environment variables

Type

str

Default Value

None

CLI Switch

-tool_env 'tool step index name <str>'

Example (CLI)

-tool_env 'openroad cts 0 MYVAR 42'

Example (API)

chip.set('tool','openroad','env','cts','0','MYVAR','42')

Environment variables to set for individual tasks. Keys and values should be set in accordance with the tool’s documentation. Most tools do not require extra environment variables to function.

1.3.18.3. exe

Description

Tool: executable name

Type

str

Default Value

None

CLI Switch

-tool_exe 'tool <str>'

Example (CLI)

-tool_exe 'openroad openroad'

Example (API)

chip.set('tool','openroad','exe','openroad')

Tool executable name.

1.3.18.4. format

Description

Tool: manifest file format

Type

str

Default Value

None

CLI Switch

-tool_format 'tool <file>'

Example (CLI)

-tool_format 'yosys tcl'

Example (API)

chip.set('tool','yosys','format','tcl')

File format for tool manifest handoff. Supported formats are tcl, yaml, and json.

1.3.18.5. input

Description

Tool: input files

Type

[file]

Default Value

[]

CLI Switch

-tool_input 'tool step index <str>'

Example (CLI)

-tool_input 'openroad place 0 oh_add.def'

Example (API)

chip.set('tool','openroad','input','place','0','oh_add.def')

List of data files to be copied from previous flowgraph steps ‘output’ directory. The list of steps to copy files from is defined by the list defined by the dictionary key [‘flowgraph’, step, index, ‘input’]. All files must be available for flow to continue. If a file is missing, the program exists on an error.

1.3.18.6. keep

Description

Tool: files to keep

Type

[str]

Default Value

[]

CLI Switch

-tool_keep 'tool step index <str>'

Example (CLI)

-tool_keep 'surelog import 0 slp_all'

Example (API)

chip.set('tool','surelog','script','import','0','slpp_all')

Names of additional files and directories in the work directory that should be kept when ['option', 'clean'] is true.

1.3.18.7. licenseserver

Description

Tool: license servers

Type

[str]

Default Value

[]

CLI Switch

-tool_licenseserver 'name key <str>'

Example (CLI)

-tool_licenseserver 'atool ACME_LICENSE 1700@server'

Example (API)

chip.set('tool','atool','licenseserver','ACME_LICENSE','1700@server')

Defines a set of tool specific environment variables used by the executables that depend on license key servers to control access. For multiple servers, separate each server by a ‘colon’. The named license variable are read at runtime (run()) and the environment variables are set.

1.3.18.8. option

Description

Tool: executable options

Type

[str]

Default Value

[]

CLI Switch

-tool_option 'tool step index <str>'

Example (CLI)

-tool_option 'openroad cts 0 -no_init'

Example (API)

chip.set('tool','openroad','option','cts','0','-no_init')

List of command line options for the tool executable, specified on a per tool and per step basis. Options must not include spaces. For multiple argument options, each option is a separate list element.

1.3.18.9. output

Description

Tool: output files

Type

[file]

Default Value

[]

CLI Switch

-tool_output 'tool step index <str>'

Example (CLI)

-tool_output 'openroad place 0 oh_add.def'

Example (API)

chip.set('tool','openroad','output','place','0','oh_add.def')

List of data files to be copied from previous flowgraph steps ‘output’ directory. The list of steps to copy files from is defined by the list defined by the dictionary key [‘flowgraph’, step, index, ‘output’]. All files must be available for flow to continue. If a file is missing, the program exists on an error.

1.3.18.10. path

Description

Tool: executable path

Type

dir

Default Value

None

CLI Switch

-tool_path 'tool <dir>'

Example (CLI)

-tool_path 'openroad /usr/local/bin'

Example (API)

chip.set('tool','openroad','path','/usr/local/bin')

File system path to tool executable. The path is prepended to the system PATH environment variable for batch and interactive runs. The path parameter can be left blank if the ‘exe’ is already in the environment search path.

1.3.18.11. refdir

Description

Tool: script directory

Type

[dir]

Default Value

[]

CLI Switch

-tool_refdir 'tool step index <dir>'

Example (CLI)

-tool_refdir 'yosys syn 0 ./myref'

Example (API)

chip.set('tool','yosys','refdir','syn','0','./myref')

Path to directories containing reference flow scripts, specified on a per step and index basis.

1.3.18.12. regex

Description

Tool: regex filter

Type

[str]

Default Value

[]

CLI Switch

-tool_regex 'tool step index suffix <str>'

Example (CLI)

-tool_regex 'openroad place 0 error -v ERROR'

Example (API)

chip.set('tool','openroad','regex','place','0','error','-v ERROR')

A list of piped together grep commands. Each entry represents a set

of command line arguments for grep including the regex pattern to match. Starting with the first list entry, each grep output is piped into the following grep command in the list. Supported grep options include, -t, -i, -E, -x, -e. Patterns starting with “-” should be directly preceeded by the “-e” option. The following example illustrates the concept.

UNIX grep: >> grep WARNING place.log | grep -v “bbox” > place.warnings

siliconcompiler: chip.set(‘tool’,’openroad’,’regex’,’place’,0’,’warnings’,[“WARNING”,”-v bbox”])

Defines a set of tool specific environment variables used by the executables that depend on license key servers to control access. For multiple servers, separate each server by a ‘colon’. The named license variable are read at runtime (run()) and the environment variables are set.

1.3.18.13. report

Description

Tool: report files

Type

[file]

Default Value

[]

CLI Switch

-tool_report 'tool step index metric <str>'

Example (CLI)

-tool_report 'openroad place 0 holdtns place.log'

Example (API)

chip.set('tool','openroad','report','syn','0','holdtns','place.log')

List of report files associated with a specific ‘metric’. The file path specified is relative to the run directory of the current task.

1.3.18.14. require

Description

Tool: parameter requirements

Type

[str]

Default Value

[]

CLI Switch

-tool_require 'tool step index <str>'

Example (CLI)

-tool_require 'openroad cts 0 design'

Example (API)

chip.set('tool','openroad','require','cts','0','design')

List of keypaths to required tool parameters. The list is used by check() to verify that all parameters have been set up before step execution begins.

1.3.18.15. script

Description

Tool: entry script

Type

[file]

Default Value

[]

CLI Switch

-tool_script 'tool step index <file>'

Example (CLI)

-tool_script 'yosys syn 0 syn.tcl'

Example (API)

chip.set('tool','yosys','script','syn','0','syn.tcl')

Path to the entry script called by the executable specified on a per tool and per step basis.

1.3.18.16. stderr

1.3.18.16.1. destination

Description

Tool: Destination for stderr

Type

str

Default Value

log

CLI Switch

-tool_stderr_destination 'tool step index [log|output|none]'

Example (CLI)

-tool_stderr_destination 'ghdl import 0 log'

Example (API)

chip.set('tool','ghdl','stderr','import','0','destination','log')

Defines where to direct the output generated over stderr. Supported options are: none: the stream generated to STDERR is ignored log: the generated stream is stored in <step>.<suffix>; if not in quiet mode, it is additionally dumped to the display output: the generated stream is stored in outputs/<design>.<suffix>

1.3.18.16.2. suffix

Description

Tool: File suffix for redirected stderr

Type

str

Default Value

log

CLI Switch

-tool_stderr_suffix 'tool step index <str>'

Example (CLI)

-tool_stderr_suffix 'ghdl import 0 log'

Example (API)

chip.set('tool','ghdl','stderr','import','0','suffix','log')

Specifies the file extension for the content redirected from stderr.

1.3.18.17. stdout

1.3.18.17.1. destination

Description

Tool: Destination for stdout

Type

str

Default Value

log

CLI Switch

-tool_stdout_destination 'tool step index [log|output|none]'

Example (CLI)

-tool_stdout_destination 'ghdl import 0 log'

Example (API)

chip.set('tool','ghdl','stdout','import','0','destination','log')

Defines where to direct the output generated over stdout. Supported options are: none: the stream generated to STDOUT is ignored log: the generated stream is stored in <step>.<suffix>; if not in quiet mode, it is additionally dumped to the display output: the generated stream is stored in outputs/<design>.<suffix>

1.3.18.17.2. suffix

Description

Tool: File suffix for redirected stdout

Type

str

Default Value

log

CLI Switch

-tool_stdout_suffix 'tool step index <str>'

Example (CLI)

-tool_stdout_suffix 'ghdl import 0 log'

Example (API)

chip.set('tool','ghdl','stdout','import','0','suffix','log')

Specifies the file extension for the content redirected from stdout.

1.3.18.18. threads

Description

Tool: thread parallelism

Type

int

Default Value

None

CLI Switch

-tool_threads 'tool step index <int>'

Example (CLI)

-tool_threads 'magic drc 0 64'

Example (API)

chip.set('tool','magic','threads','drc','0','64')

Thread parallelism to use for execution specified on a per tool and per step basis. If not specified, SC queries the operating system and sets the threads based on the maximum thread count supported by the hardware.

1.3.18.19. var

Description

Tool: script variables

Type

[str]

Default Value

[]

CLI Switch

-tool_variable 'tool step index key <str>'

Example (CLI)

-tool_variable 'openroad cts 0 myvar 42'

Example (API)

chip.set('tool','openroad','var','cts','0','myvar','42')

Tool script variables specified as key value pairs. Variable names and value types must match the name and type of tool and reference script consuming the variable.

1.3.18.20. vendor

Description

Tool: vendor

Type

str

Default Value

None

CLI Switch

-tool_vendor 'tool <str>'

Example (CLI)

-tool_vendor 'yosys yosys'

Example (API)

chip.set('tool','yosys','vendor','yosys')

Name of the tool vendor. Parameter can be used to set vendor specific technology variables in the PDK and libraries. For open source projects, the project name should be used in place of vendor.

1.3.18.21. version

Description

Tool: version

Type

[str]

Default Value

[]

CLI Switch

-tool_version 'tool <str>'

Example (CLI)

-tool_version 'openroad >=v2.0'

Example (API)

chip.set('tool','openroad','version','>=v2.0')

List of acceptable versions of the tool executable to be used. Each entry in this list must be a version specifier as described by Python PEP-440. During task execution, the tool is called with the ‘vswitch’ to check the runtime executable version. If the version of the system executable is not allowed by any of the specifiers in ‘version’, then the job is halted pre-execution. For backwards compatibility, entries that do not conform to the standard will be interpreted as a version with an ‘==’ specifier. This check can be disabled by setting ‘novercheck’ to True.

1.3.18.22. vswitch

Description

Tool: executable version switch

Type

[str]

Default Value

[]

CLI Switch

-tool_vswitch 'tool <str>'

Example (CLI)

-tool_vswitch 'openroad -version'

Example (API)

chip.set('tool','openroad','vswitch','-version')

Command line switch to use with executable used to print out the version number. Common switches include -v, -version, –version. Some tools may require extra flags to run in batch mode.

1.3.18.23. warningoff

Description

Tool: warning filter

Type

[str]

Default Value

[]

CLI Switch

-tool_warningoff 'tool <str>'

Example (CLI)

-tool_warningoff 'verilator COMBDLY'

Example (API)

chip.set('tool','verilator','warningoff','COMBDLY')

A list of EDA warnings for which printing should be suppressed. Generally this is done on a per design basis after review has determined that warning can be safely ignored The code for turning off warnings can be found in the specific tool reference manual.

1.3.19. unit

1.3.19.1. capacitance

Description

Unit: capacitance

Type

str

Default Value

pf

CLI Switch

-unit_capacitance '<str>'

Example (CLI)

-unit_capacitance 'pf'

Example (API)

chip.set('unit','capacitance',pf)

Units used for capacitance when not explicitly specified.

1.3.19.2. current

Description

Unit: current

Type

str

Default Value

ma

CLI Switch

-unit_current '<str>'

Example (CLI)

-unit_current 'ma'

Example (API)

chip.set('unit','current',ma)

Units used for current when not explicitly specified.

1.3.19.3. energy

Description

Unit: energy

Type

str

Default Value

pj

CLI Switch

-unit_energy '<str>'

Example (CLI)

-unit_energy 'pj'

Example (API)

chip.set('unit','energy',pj)

Units used for energy when not explicitly specified.

1.3.19.4. inductance

Description

Unit: inductance

Type

str

Default Value

nh

CLI Switch

-unit_inductance '<str>'

Example (CLI)

-unit_inductance 'nh'

Example (API)

chip.set('unit','inductance',nh)

Units used for inductance when not explicitly specified.

1.3.19.5. length

Description

Unit: length

Type

str

Default Value

um

CLI Switch

-unit_length '<str>'

Example (CLI)

-unit_length 'um'

Example (API)

chip.set('unit','length',um)

Units used for length when not explicitly specified.

1.3.19.6. mass

Description

Unit: mass

Type

str

Default Value

g

CLI Switch

-unit_mass '<str>'

Example (CLI)

-unit_mass 'g'

Example (API)

chip.set('unit','mass',g)

Units used for mass when not explicitly specified.

1.3.19.7. power

Description

Unit: power

Type

str

Default Value

mw

CLI Switch

-unit_power '<str>'

Example (CLI)

-unit_power 'mw'

Example (API)

chip.set('unit','power',mw)

Units used for power when not explicitly specified.

1.3.19.8. resistance

Description

Unit: resistance

Type

str

Default Value

ohm

CLI Switch

-unit_resistance '<str>'

Example (CLI)

-unit_resistance 'ohm'

Example (API)

chip.set('unit','resistance',ohm)

Units used for resistance when not explicitly specified.

1.3.19.9. time

Description

Unit: time

Type

str

Default Value

ns

CLI Switch

-unit_time '<str>'

Example (CLI)

-unit_time 'ns'

Example (API)

chip.set('unit','time',ns)

Units used for time when not explicitly specified.

1.3.19.10. voltage

Description

Unit: voltage

Type

str

Default Value

mv

CLI Switch

-unit_voltage '<str>'

Example (CLI)

-unit_voltage 'mv'

Example (API)

chip.set('unit','voltage',mv)

Units used for voltage when not explicitly specified.

1.4. Nested keypaths

The SC schema has two special top-level categories that store nested subsets of the schema rather than unique parameters.

1.4.1. history

The “history” prefix stores configuration from past runs, indexed by jobname. Values are stored automatically at the end of run(), and only parameters tagged with the ‘job’ scope are stored. This can be used to go back and inspect the results of old runs. As a shortcut for accessing these stored values, most of the schema access functions support an optional job keyword arg. For example, the following line returns the number of errors from a synthesis step run as part of a job called “job0”:

chip.get('metric', 'syn', '0', 'error', job='job0')

1.4.2. library

The “library” prefix stores the schema parameters of library chip objects that have been imported into the current chip object, keyed by library name. These values are accessed directly using the schema access functions. For example, the following line returns the path to a LEF file associated with a library called “mylib”:

chip.find_files('library', 'mylib', 'model', 'layout', 'lef', stackup)