4. Revision History and Change Log#
The changes in each SiliconCompiler release version are described below. Commit version shown in (). Where applicable, the contributors that suggested a given feature are shown in [].
4.1. SiliconCompiler 0.21.9 (2024-04-12)#
Minor:
General cleanup of documentation building.
Tools:
yosys: added support for specifying blackbox models via [‘tool’, ‘yosys’, ‘task’, ‘syn_asic’, ‘var’, ‘blackbox_modules’]
4.2. SiliconCompiler 0.21.8 (2024-04-11)#
Minor:
Fixed packaging extraction when downloading from github.
Fixed remote run fiel retrival to avoid errors when extracting and moving files.
Tools:
vpr: added support for show and screenshoting tasks.
4.3. SiliconCompiler 0.21.7 (2024-04-02)#
Minor:
Update remote code to honor constraints transmitted by the remote runner.
Add fall back to package locking when file system locking is not available.
Fixed handling of github artifact packages.
Added build scripts for ubuntu22.
Tools:
vpr: add reporting images to tool driver, these can be disabled via [‘tool’, ‘vpr’, ‘task’, ‘place’ or ‘route’, ‘var’, ‘enable_images’] = ‘false’.
4.4. SiliconCompiler 0.21.6 (2024-03-28)#
Minor:
Fixed handling of files with codec errors.
Update package lock file handling to avoid race conditions in parallel flows.
Tools:
yosys: minor code cleanup in FPGA flow.
vpr: add support for clock routing.
surelog: added wrapper comments in output file for parsing to indicate where segments of code came from.
4.5. SiliconCompiler 0.21.5 (2024-03-21)#
Minor:
Added a github data source to handle data from private repositories.
Tools:
vpr: added pin metrics collection for FPGA flows.
4.6. SiliconCompiler 0.21.4 (2024-03-15)#
Minor:
Added keys to schema to track FPGA resources.
Tools:
yosys: add metrics collection for FPGA flows.
vpr: added metrics collection for FPGA flows.
4.7. SiliconCompiler 0.21.3 (2024-03-13)#
Minor:
Tools:
openroad: fixed handling of pin constraints
yosys: updated to take advantange of native dont_use interfaces
4.8. SiliconCompiler 0.21.2 (2024-03-08)#
Minor:
Fix importing of package data from non libraries
Fix unlocking behavior in schema keys
4.9. SiliconCompiler 0.21.1 (2024-03-07)#
Minor:
Fix handling of python module packages on older versions of python.
4.10. SiliconCompiler 0.21.0 (2024-03-07)#
Major:
Added support for handling soft libraries in the schema via [‘option’, ‘library’] and updated all frontend task drivers to support these.
Minor:
Ensure that libraries, which import a library, are handled correctly.
4.11. SiliconCompiler 0.20.3 (2024-03-06)#
Minor:
Added testing to ensure command line arguments are all checked for functionality and follow the schema pattern.
Fixed python package lookup when the installed package does not match the name of the distribution.
Added print controls to command line applications to allow custom arguments to be displayed along with schema values via the key sc_print:.
Updated the conda environment and added testing to ensure functionality.
4.12. SiliconCompiler 0.20.2 (2024-02-20)#
Minor:
Fixed some issued identified by tclint.
Added helper function to better detect locally installed and editable python packages for package registration.
4.13. SiliconCompiler 0.20.1 (2024-02-12)#
Major:
Moved from hosting third party pdks in SiliconCompiler to fully using lamdapdk.
Added a demonstration target for gf180.
Minor:
Tools:
vpr: added support for pin constraints.
openroad: added estimated routing congestion to the task image writing and updated fmax metric collection to use OpenROAD directly.
4.14. SiliconCompiler 0.20.0 (2024-02-01)#
Major:
Update file path hashing to include package information.
Minor:
Tools:
yosys: update FPGA synthesis to better map LUTs and memories.
openroad: added option to control CTS with obstruction awareness via via [‘tool’, ‘openroad’, ‘task’, ‘cts’, ‘var’, ‘cts_obstruction_aware’].
klayout: added operation to be able to rename cells in layout via [‘tool’, ‘klayout’, ‘task’, ‘operations’, ‘var’, ‘operations’, ‘rename_cell’].
4.15. SiliconCompiler 0.19.1 (2024-01-24)#
Major:
Tools:
yosys: updated implementation for FPGA flow to better support flip-flop mapping and hard macro extraction and mapping.
Minor:
Package downloading to ensure GitHub release artifacts can be downloaded from private repositories.
4.16. SiliconCompiler 0.19.0 (2024-01-05)#
Major:
Expanded and clarified the datasheet category of the schema.
4.17. SiliconCompiler 0.18.2 (2023-12-18)#
Minor:
Fixed resolving paths in package sources when paths contain environmental variables.
4.18. SiliconCompiler 0.18.1 (2023-12-13)#
Minor:
Fixed importing of libraries to collect package sources during import.
Tools:
klayout: fixed loading of schema in the presence of other modules named schema.
4.19. SiliconCompiler 0.18.0 (2023-12-04)#
Major:
Added [‘option’, ‘cache’] keypath to control the location of the cached data.
Added support for Python 3.12
4.20. SiliconCompiler 0.17.0 (2023-11-16)#
Major:
Added [‘package’, ‘source’, ‘<name>’, ‘path’] and [‘package’, ‘source’, ‘<name>’, ‘ref’] to support directly downloading of required data for a design, pdk, library, etc.
Removed support for $SCPATH and [‘option’, ‘scpath’] in favor of using package sources.
Minor:
Tools:
yosys: fixed handling of blackboxes during verilog reading, improved the sdc parsing to better estimate the clock for yosys-abc
OpenROAD: fixed PDN file handling to only read files once to avoid errors from redefining the same grids.
4.21. SiliconCompiler 0.16.3 (2023-11-02)#
Minor:
Removed unused [‘flowgraph’, ‘<graph>’, ‘<step>’, ‘<index>’, ‘valid’] field from schema.
Tools:
klayout: fixed DEF to GDS generation by ensuring the correct units are used during DEF read in and fixes the stream writing to honor OASIS if requested.
OpenROAD: fixed handling of unidirectional layers in routing task and added tasks to support generating OpenRCX parasitic extraction decks.
4.22. SiliconCompiler 0.16.2 (2023-10-13)#
Minor:
Added line numbers to the error and warning log files to aid in tracking down the message in the main log.
4.23. SiliconCompiler 0.16.1 (2023-10-11)#
Minor:
Fixed incorrect settings when submitting remote jobs.
4.24. SiliconCompiler 0.16.0 (2023-10-09)#
Major:
Deprecated support for Python 3.6 and 3.7.
Added [‘option’, ‘from’], [‘option’, ‘to’], and [‘option’, ‘prune’] to better control the execution of the flowgraph.
Removed leflib from SilconCompiler and use the standalone implementation provided via pip install sc-leflib.
Minor:
Moved the built in server to use the Schema class for handling its settings.
Fixed handling of Windows paths when submitting jobs from a Windows machine to a linux runner.
Corrected the return behavior from the schema .get() to ensure lists are copied instead of being returned by reference.
Fixed behavior where sc-show would require both step and index to be specified and allowed for directories to be specified as the show target.
Tools:
yosys: Updated to support new ABC interface for passing along dont_use cells.
verilator: added support for assertions via [‘tool’, ‘verilator’, ‘task’, ‘compile’/’lint’, ‘var’, ‘enable_assert’]
4.25. SiliconCompiler 0.15.4 (2023-09-25)#
Minor:
Added -design to sc-dashboard and ensured common behavior between sc-show and sc-dashboard.
Disabled sorting of keys in writing of the json schema to preserve the order in the original dictionary.
Added an alias (siliconcompiler) to the commandline application sc to allow Windows users to be better able to use SiliconCompiler.
Tools:
surelog: Ensure the bundled version is built using a static zlib library for Windows distribution.
OpenROAD: Added more controls over the heatmap image generation and to only write heatmaps with data available.
4.26. SiliconCompiler 0.15.3 (2023-09-21)#
Minor:
Fixes to sc-show for viewing remote files to ensure it does not attempt to use the file paths from the remote, but instead the local file paths.
Tools:
klayout: Use build technology files and layer display files in show and ensure these are placed into the outputs directory when exporting to a GDS.
4.27. SiliconCompiler 0.15.2 (2023-09-18)#
Minor:
Fixes minor bug in the dashboard which prevented the launching the dashboard.
Ensures all tool output goes through the logger.
Improved implementation of .valid() to provide faster checking.
Tools:
OpenROAD: fixed bugs in instance creation and pin access function calls. Implemented support for multiple library corners assigned to a single scenario in timing constraints.
yosys: Implemented support for multiple library corners assigned to a single scenario in timing constraints.
4.28. SiliconCompiler 0.15.1 (2023-09-08)#
Major:
Merged sc-configure into sc-remote to unify the remote interface
Minor:
Fixed missing information in documentation build for flowgraphs.
Removed call to delete_job on remote jobs, relying on remote to handle cleanup instead.
Refactored core run functions for better code management.
4.29. SiliconCompiler 0.15.0 (2023-08-31)#
Major:
Updated schema to remove unused [‘option’, ‘skipstep’] key and add record to store the remote job id in [‘record’, ‘remoteid’].
Minor:
Added additional error checking and file cleanup to remote run to ensure empty files are not left behind.
Fixed handling of setting list of tuples in the schema to corrected parse the values.
Tools:
OpenROAD - disabled timing optimizations by default, added support for generating report images in the screenshot task via [‘tool’, ‘openroad’, ‘task’, ‘screenshot’, ‘var’, ‘include_report_images’].
Chisel - added support for handling build.sbt via the input fileset [‘input’, ‘config’, ‘chisel’].
4.30. SiliconCompiler 0.14.0 (2023-08-21)#
Major:
Reworked FPGA to allow for better handling of FPGA parameters in the schema.
Added missing mechanical parameters to the schema and updating the signal interface naming for clarity.
Stop execution upon node failures, instead of continuing with repeated failures.
Minor:
Ensure [‘option’, ‘nodisplay’] is set when the environment does not support graphics.
Added error checking for [‘option’, ‘steplist’] to match current flowgraph.
Removed physyn step from asicflow.
Fixed issue when running remote and the submitted files are not updated.
Tools:
OpenROAD - update default value for […, ‘var’, ‘grt_macro_extension’] to ‘0’ to allow for better routing.
verilator - reworked options selection to allow for better control of user selected tool options.
yosys - added support for blackboxes in libraries via [‘library’, <lib>, ‘output’, ‘blackbox’, ‘verilog’].
4.31. SiliconCompiler 0.13.2 (2023-08-10)#
Major:
Added graphs view to dashboard for comparing metrics across runs.
Added
sc-remoteapp for checking server status and interacting with running remote jobs (replacessc-ping).
Minor:
Added checkbox to dashboard for enabling “raw” view of manifest.
Tools:
OpenROAD - made repair_design more verbose (requires updated version), added option to generate design images at end of task via [‘tool’, ‘openroad’, ‘task’, <task>, ‘var’, ‘ord_enable_images’], tweaked pin placement behavior, added SDF file output to export task.
surelog - fixed driver to sanitize escape characters in Verilog output, added option to disable write cache via [‘tool’, ‘surelog’, ‘task’, ‘parse’, ‘var’, ‘disable_write_cache’].
klayout - added option to allow missing cells in stream files via [‘library’, <lib>, ‘option’, ‘var’, ‘klayout_allow_missing_cell’], added option to set DB units via [‘pdk’, <pdk>, ‘var’, ‘klayout’, ‘units’, <stackup>].
4.32. SiliconCompiler 0.13.1 (2023-07-21)#
Minor:
Improved remote run reliability, including graceful time-outs when server not responding and thread-safety fixes.
Added [‘option’, ‘libext’] support for Surelog, Verilator, and Icarus.
Removed dashboard support for Python 3.6.
Made aesthetic tweaks to dashboard.
Fixed bundled Surelog on pre-macOS 12.
Tools:
yosys - fixed synthesis strategies.
verilator - added multithreading, added FST trace format support.
OpenROAD - bumped minimum version to better support IR drop analysis, added additional controls for abstract LEF generation, updated scripts to improve ORFS correspondence, fixed to use correct layers for parasitic estimation.
4.33. SiliconCompiler 0.13.0 (2023-07-07)#
Major:
Added dashboard to SiliconCompiler to allow better inspection of the run information and added sc-dashboard app to open and display the dashboard.
Minor:
Added [‘input’, ‘constraint’, ‘upf’] as a recognized format
Tools:
surelog - added support for lowmem option via [‘tool’, ‘surelog’, ‘task’, ‘parse’, ‘var’, ‘enable_lowmem’]
4.34. SiliconCompiler 0.12.3 (2023-06-23)#
Major:
Added new flow
screenshotflowto enable generating high quality stream images via klayout and imagemagick/montage.Added new tool
executeto enable executing the output of a previous task, such as in the case of compiling a binary in one step and executing it in the next.
Minor:
sc-showfixed error handling when attempting to how a file without a manifest.Added support for pathlib.Path objects when setting file and dir type parameters in the manifest.
Tools:
yosys - fixed marking liberty files dont_use and ensure each library is merged together for ABC. Updated driver to use lower case true/false for [‘tool’, ‘openroad’, ‘task’, ‘*’, ‘var’] to be consistent with other tools.
verilator - added support for pins-bv via [‘tool’, ‘verilator’, ‘task’, ‘compile’, ‘var’, ‘pins_bv’] and compile modes via [‘tool’, ‘verilator’, ‘task’, ‘compile’, ‘var’, ‘mode’].
4.35. SiliconCompiler 0.12.2 (2023-06-14)#
Major:
Added additional arguments to
sc-showto provide access to specific steps and indices in the run.
Minor:
Tools:
OpenROAD - added generation of separate timing and power reports in the reports/ directory to provide better insights into the design, added additional parameters to timing repair to enable minimizing total negative slack [‘tool’, ‘openroad’, ‘task’, ‘place’, ‘var’, ‘rsz_repair_tns’], and added support for RTL-MP for macro placement.
yosys - added initial support for hierarchical synthesis via [‘tool’, ‘yosys’, ‘task’, ‘syn_asic’, ‘var’, ‘hier_threshold’], this is disabled by default while it is still in development.
4.36. SiliconCompiler 0.12.1 (2023-06-07)#
Major:
Fixed writing of manifest to preserve values that were previously removed incorrectly.
Updated recording of [‘record’, …] to track tool versions, tool options, task start and end times, and SiliconCompiler version, while preserving control of sensitive records like [‘record’, ‘ipaddr’] with [‘option’, ‘track’].
Minor:
Fixed handling of
sc-issueto avoid clobbering the user set options and only bundle the required files for a testcase to minimize the size of the file.Added error checking for
create_cmdlineto check for invalid arguments.Tools:
OpenROAD - added support for disallowing one site gaps in detail placement [‘tool’, ‘openroad’, ‘task’, ‘place’, ‘var’, ‘dpl_disallow_one_site’]. Added support for [‘option’, ‘warningoff’]
surelog - Added support for [‘option’, ‘warningoff’]
Verilator - Added support for [‘option’, ‘warningoff’]
4.37. SiliconCompiler 0.12.0 (2023-05-24)#
Major:
Added/updated parameters in [‘datasheet’] section of the schema to allow for better capturing of design datasheet.
Updated Verilator tool driver to support CFLAGS/LDFLAGS and fix linting task.
Added operations task to klayout to allow for unit operations on GDSs like merging, adding outlines, rotating, etc.
Added options to
archive()to support archiving multiple jobs and filtering files to include.
Minor:
Added enforcement of [‘option’, ‘mode’] to ensure it is set for better manifest checking.
Added per-pin voltage constraints for better support of multiple power/voltage domains, [‘constraint’, ‘timing’, scenario, ‘voltage’, pin].
Fixed tool drivers to ensure proper use of
find_files()is not done insetup().Added check for permissions error while collecting child process memory statistics.
4.38. SiliconCompiler 0.11.2 (2023-05-15)#
Major:
Updated
sc-issueto generate self-contained testcases to allow for better sharing of testcases.Updated klayout tool driver to support map-file option for DEF-GDS export step, and remove need for hard coded options in
.lytfile in favor of getting values from the schema.
Minor:
Updated loading order to target in commandline interface to ensure schema parameers are set before loading target.
Error checking for flowgraphs with duplicated edges.
Added
-exttosc-showcommand to control what file is opened when multiple files are available.Tools:
OpenROAD - added flags to control antenna repairs: [‘tool’, ‘openroad’, ‘task’, ‘route’, ‘var’, ‘ant_check’] and [‘tool’, ‘openroad’, ‘task’, ‘route’, ‘var’, ‘ant_repair’]; added clock buffer selection option from the library with [‘library’, lib, ‘option’, ‘openroad_cts_clock_buffer’]
4.39. SiliconCompiler 0.11.1 (2023-05-03)#
Major:
Revamped documentation for better readability and navigability.
Minor:
Fixed handling when loading schemas from JSON to ensure values are normalized correctly.
When a tool fails, the last 10 lines of the log is printed when [‘option’, ‘quiet’] is set to aid in debugging.
Updated server/client to use python tarfile module instead of spawning subprocesses.
Implemented python linting.
Tools:
OpenROAD - implemented snapping to sites or manufacturing grid for component placement via [‘tool’, ‘openroad’, ‘task’, ‘floorplan’, ‘var’, ‘ifp_snap_strategy’] and added ability to select SDC IO buffer for automatic constraint generation via [‘tool’, ‘openroad’, ‘task’, ‘floorplan’, ‘var’, ‘sdc_buffer’].
yosys - fixed invalid keypath access when logiclib is incorrectly specified.
4.40. SiliconCompiler 0.11.0 (2023-04-17)#
Major:
sc-issueadded as command line application to support sharing runnable testcases.Removed the requirement that the initial task of the flowgraph be called ‘import’ and the final task be called ‘export’.
Fully implemented
.node()to take in a task module, simplifying the construction of a flowgraph and removing its dependence on [‘option’, ‘scpath’].
Minor:
[‘tool’, tool, version, ‘sbom’] added to be able to track a tools SBOM.
.hash_files()updated to honor the ‘hash’ field for the file parameters..calc_yield(),.calc_area(),.calc_dpw()updated to new schema parameters.
4.41. SiliconCompiler 0.10.2 (2023-04-04)#
Major:
Support for Python 3.11
Building arm64 wheels for surelog
Minor:
Tools:
general - deployed docker based CI with automatic tool building and testing
klayout - support for OAS stream files via [‘tool’, ‘klayout’, ‘task’, ‘export’, ‘var’, ‘stream’] = ‘oas’, better detection of missing layout cells
yosys - support for controlling buffer insertion via [‘tool’, ‘yosys’, ‘task’, ‘syn_asic’, ‘var’, ‘add_buffers’] = ‘True’/’False’
openroad - correct handling of INF timing in metrics
Improve memory recording to account for child processes
General documentation cleanup
4.42. SiliconCompiler 0.10.1 (2023-03-11)#
Major:
Adding
._record_metric()for tool drivers to use when recording metrics to ensure they honor the schema units and record the source of the metric at the same time.
Minor:
Improved error handling and messaging for remote jobs.
Fixed HTML summary report and PNG summary image not getting rebuilt when calling
.summary()Updated
.summary()table to display units and format numbers accordingly.
4.43. SiliconCompiler 0.10.0 (2023-03-08)#
Major:
Schema overhauled (see schema documentation for details):
Added ability to override certain schema parameters on a per-step/index basis.
Added step and index to schema access methods.
Expanded constraints category to include component and pin placement.
Cleaned up parameters which were duplicated in other categories.
Implemented [‘input’, …] and [‘output’, …] filesets along with
.input()and.output()helper functions
Added tasks to tools prevent step name from getting used for task identification.
Implemented
.use()in favor of.load_pdk(),.load_flow(), etc. to take in Python modules instead of strings.Changed libraries, flows, checklists, and pdks to explicitly return a particular class object.
Generate a summary PNG.
Removed Floorplanning API.
Added support for custom macros and scripts in the remote workflow.
Minor:
Updated OpenROAD scripts to support a hierarchical flow.
Updated Yosys scripts to better support hierarchy.
Improved auto documentation generation.
Updated pdk and library settings to provide additional corners where available.
Updated documentation, including Installation, Quickstart Guide and Tutorials.
Added Fmax as a first-order metric to the Schema
4.44. SiliconCompiler 0.9.6 (2022-10-03)#
Major:
Fixed bug that causes tool setup information to be lost when running a flow in multiple chunks using a steplist.
Minor:
Fixed old schema references in Yosys synthesis strategy scripts.
Updated error message for missing file requirements.
Updated OpenROAD scripts to handle multiple LEF files.
Updated KLayout driver to use batch mode flag and capture more warnings.
Updated Verilator driver to implement [‘option’, ‘trace], [‘option’, ‘warningoff’], and provide passthroughs for CFLAGS and LDFLAGS.
Removed support for ‘extraopts’ passthrough in Verilator driver.
Updated version of Surelog bundled with wheels distribution.
4.45. SiliconCompiler 0.9.5 (2022-09-12)#
Minor:
Schema: Added [‘tool’, <tool>, ‘prescript’/’postscript’, <step>, <index>] to support user-supplied pre- and post-scripts for script-based tools.
Schema: Added [‘tool’, <tool>, ‘file’, <step>, <index>] passthrough parameter.
Added runtime logic to terminate tools that do not exit on their own after a job is interrupted with ctrl-c.
Fixed KLayout show bugs.
Fixed issue building SC in editable mode using newer versions of Pip/setuptools.
4.46. SiliconCompiler 0.9.4 (2022-08-25)#
Major:
Changed
run()logic to not reset metrics to zero.summary()will only display metrics that have been explicitly set.
Minor:
Schema: Changed [‘constraint’, <scenario>, ‘libcorner’] from scalar to list.
Added support for –latches option in GHDL driver.
Added
:keypath:directive to distributed Sphinx extensions.Added reports and final manifest to
archive()outputs.Fixed bug where
jobargument tofind_files()was not handled properly.Fixed pin sizes and PDN vias in Caravel wrapper example.
Updated flow scripts to support newer version of OpenROAD.
Updated version of Surelog bundled with wheels distribution.
4.47. SiliconCompiler 0.9.3 (2022-08-01)#
Major:
Added basic editing functionality for signoff checklists in HTML report.
Changed file collection behavior:
For local runs, inputs are not copied into import/ at all.
For remote runs, inputs are copied into import/0/inputs/ only, not outputs/.
Implemented [‘option’, ‘entrypoint’], allowing users to specify an alternative top-level.
Implemented support for “pure Python” tools.
A
run()method inside a tool setup file will be run instead of an executable.
Minor:
Changed
run()behavior to read metrics from all leaf tasks.Fixed implementation of [‘option’, ‘jobincr’].
Fixed bug causing exception on
summary()for machines with a default encoding other than UTF-8.Fixed logfile reading logic to gracefully handle invalid characters.
Improved error messages for some common issues.
4.48. SiliconCompiler 0.9.2 (2022-07-08)#
Major:
Schema: Added [‘option’, ‘flowcontinue’] to control whether flow continues when a tool reports errors.
This used to be controlled by [‘tool’, <tool>, ‘continue’], but this parameter is meant to feed directly into tools (rather than controlling the SC runtime).
Schema: Added [‘option’, ‘continue’] parameter to control whether errors in the Python API are fatal.
The default value makes errors fatal, setting this parameter to True reverts to the old behavior.
Added VPR-based FPGA bitstream generation flow.
Added logic to set errors and warnings metrics based on [‘tool’, <tool>, ‘regex’, …] matches. This reduces tool driver boilerplate and makes the metrics consistent with the generated regex match files.
Minor:
Changed default technology target for
scapp.Changed KLayout show script to always use a dark background.
Changed
check_manifest()to allow tool tasks to have multiple inputs (behaving as if they were merged with a “join” builtin).Changed
check_manifest()to return True on success rather than 0 (the previous behavior didn’t match the documentation).Changed Yosys and OpenROAD tool drivers to make them easier to use in flows with alternate step names.
Changed GHDL tool driver to allow additional CLI options via [‘tool’, <tool>, ‘var’, …, ‘extraopts’].
Removed return codes from
post_process().
4.49. SiliconCompiler 0.9.1 (2022-06-21)#
Major:
Added input filetype inference based on file extension (restores functionality lost in 0.9.0).
Added manifest tree viewer to HTML report.
Added simulator exe compilation support to Verilator.
Improved TCL manifest generation:
Fixed escaping of special characters and whitespace.
Fixed insertion of “$env” in filepaths.
Changed tuple printing to be TCL list instead of tuple-like string.
Minor:
Schema: Added tool CLI arguments to [‘record’, …] schema.
Changed create_cmdline() switchlist parameter to accept switch names as specified on command line.
Changed setup module docs generator to be packaged with SC.
Changed HTML report to be self-contained.
Fixed CSV manifest generation.
4.50. SiliconCompiler 0.9.0 (2022-05-19)#
Major:
Schema: Reorganized entire schema! Changes summarized below:
Cleaned and consolidated top-level organization, most parameters are now nested.
Moved build configuration options underneath [‘option’, …].
Added [‘output’, …] to store pointers to flow outputs.
Added [‘model’, …] to store pointers to design abstractions (timing libraries, layouts, etc).
Added [‘datasheet’, …] to store information about design’s interface.
Added [‘unit’, …] to store user driven SI units specification (temp,voltage, etc)
Renamed [‘eda’, …] to [‘tool’, …]
Renamed [‘mcmm’, …] to [‘constraint’, …]
Replaced [‘source’], [‘constraint’], and [‘read’, …] with more flexible [‘input’, <filetype>] to supply input files.
Added support for storing multiple PDKs in schema and selecting which one to use for run (analogous to flows).
Change [‘flowgraph’] to support modular flow composition
Added support for package management [‘depgrah’].
Added checklist support.
Removed special [‘library’, …] keypaths. All libraries are now created as Chip objects, and have their full config imported into a parent chip’s schema.
Added ‘sup’ packaging utility
Added ability to configure stdout and stderr redirection on a per-tool basis (thanks to @suppamax for implementing).
Added flexible tool version checking based on PEP-440 standard, now enabled by default.
Added ‘clean’ feature for cleaning up intermediate tool outputs.
Added ‘resume’ feature for restarting failed flows (for debugging).
Added automatic capture of peak memory usage (adds dependency on psutil).
Changed [‘design’] to be a required parameter for instantiating a Chip.
Changed error behavior to consistently raise exceptions rather than exit.
Removed tool script copy feature, so now all EDA scripts are run from the reference directory.
Minor:
Schema: Added ability to store per-parameter designer notes.
Added offline wheels distribution.
Added
read_lef()function to help with PDK bring-up.Added environment variables to replay scripts.
Added LVS/DRC signoff flow and top-level GDS stream out flow.
Added native support for Sky130 I/O library, along with Heartbeat + padring example.
Changed internals to minimize SC performance overhead with large flowgraphs.
Changed task runtime tracking to distinguish between time spent in tool and total time.
Fixed breakpoints to work more consistently across tools.
Note: Since there was no public release of version 0.8.0, this list summarizes all changes since 0.7.0.
4.51. SiliconCompiler 0.7.0 (2022-03-02)#
Major:
Schema: Added ability to specify environment variables on a per-tool, per-task basis.
Schema: Added per-tool ‘techmap’ parameter to library schema.
Added browser-viewable report generation to core.summary().
Minor:
Schema: Added filetypes to library schema: ‘def’, ‘gerber’, ‘netlist’, ‘model’ category.
Schema: Added ‘stackup’ key to library lef/gds parameters.
Schema: Changed ‘pdk’ and ‘stackup’ library parameters to lists.
Schema: Added ‘dir’ passthrough to library schema.
Schema: Added ‘nodisplay’ option to schema to better support headless jobs.
Schema: Added ‘licensefile’ to package parameters to support non-standard licenses.
Schema: Added ‘gerber’ to read schema.
Schema: Added several cell categories to library schema.
Changed how PDK-specific Yosys and OpenROAD parameters are driven to avoid hardcoding process info in tool drivers.
Fixed step ordering bug in core.summary().
Fixed bug with how ‘arg’, ‘index’ is handled.
Fixed small bugs in automatic documentation generation.
Added core.check_filepaths() helper.
4.52. SiliconCompiler 0.6.0 (2022-02-11)#
Major:
Schema: Added ‘flow’ key to flowgraph to enable multi-flow targets.
Schema: Added ‘flow’ parameter to enable selection between flows in flowgraph.
Schema: Changed ‘_’ separated tuple target to a single ‘module’ load target.
Schema: Added ‘regex’ for grep like functionality.
Schema: Changed metal grid to use PDK metal name as the major key.
Schema: Added ‘tool’ key to PDK settings to avoid tool file conflicts.
Schema: Added ‘units’ parameter to enable tech agnostic SDC.
Schema: Added ability to specify tricky apr setup files on a per tool basis (tracks, taps, vias, antenna, etc).
Schema: Added checklist functionality
Added core.grep function
Added core.check_logfile function to core API to emulate grep behavior
Added core.load_{target, flow, lib, pdk} functions to core API in place of target()
Added asap7 target
Added docker support for basic RTL2GDS tool chain
Removed core.target() function
Minor:
Schema: Changed lib ‘driver’ to move into cells (consistency)
Schema: Added site symmetry to avoid full lef parser.
Schema: Changed tool version switch to a list
Schema: Changed ‘asic’, ‘targetlib’ to ‘asic’, ‘logiclib’ for clarity.
Schema: Changed ‘eda, ‘report’ parameter guideline to always use ‘metric’ as keyword
Schema: Added -skip_check option to speed up new target bringup
Schema: Added -skip_step option to enable skipping specific steps
Schema: Added ‘pdk’, [‘file’, ‘directory’, ‘variable’] parameters to enable tool-specific PDK setups.
Schema: Changed cell types to be hardcoded (tapcell, buf, clkbuf, etc) to avoid fragmentation.
4.53. SiliconCompiler 0.4.1 (2022-01-06)#
Minor:
Fix bug in Yosys parameter requirements spec that made check_manifest() too strict
4.54. SiliconCompiler 0.4.0 (2022-01-05)#
Major:
Schema: Add ‘tool’ key to PDK fields
Schema: Remove unneeded ‘record’ keys
Implement automatic record-keeping
Implement checks that flow make sense in terms of file I/O and that required files resolve
Allow importing multiple files with the same basename
Minor:
Automatically configure KLayout path on macOS
Allow importing multiple files with the same basename
Implement -I CLI switch for include directory
4.55. SiliconCompiler 0.3.1 (2021-12-21)#
Minor:
Fix sc-show on Windows.
4.56. SiliconCompiler 0.3.0 (2021-12-21)#
Major:
Schema: add ‘read’ section.
Schema: Add alternate frontend support.
Minor:
Fix old version of Surelog bundled with wheels
4.57. SiliconCompiler 0.1.1 (2021-12-08)#
Minor:
Fix: Prevent sc-show crash when PDK files are not found.
Fix: Ensure sc-show can find KLayout executable on Windows
4.58. SiliconCompiler 0.1.0 (2021-12-03)#
Major:
First public release!!!