3. Pre-Defined Tools#
The following are examples of pre-built tool drivers that come with SiliconCompiler which you can use for your own builds.
See the pre-built targets for examples on how these are used in conjunction with pdks, flows and libraries.
3.1. bambu#
The primary objective of the PandA project is to develop a usable framework that will enable the research of new ideas in the HW-SW Co-Design field.
The PandA framework includes methodologies supporting the research on high-level synthesis of hardware accelerators, on parallelism extraction for embedded systems, on hardware/software partitioning and mapping, on metrics for performance estimation of embedded software applications and on dynamic reconfigurable devices.
Documentation: ferrandi/PandA-bambu
Sources: ferrandi/PandA-bambu
Installation: https://panda.dei.polimi.it/?page_id=88
File: __init__.py
3.1.1. convert#
Mixin task for tools that drive ccache, pointing it at the tool cache.
Verilator’s verilated.mk sets OBJCACHE ?= ccache and invokes it
unconditionally, so every C++ build it drives shells out to ccache whether or
not anyone asked for it – including the ones a tool starts on its own
behalf, the way bambu does when it simulates. Left to itself ccache writes to
~/.cache/ccache: outside [option,cachedir], so nothing
SiliconCompiler manages ever sees it, and not among the volumes mounted into
a task container, so a containerised build starts from a cold cache every
single time. Task.cachedir is inside the mounted cache directory and
is shared across designs, which is the whole point of a compiler cache.
ccache creates the directory itself and enforces its own size cap, so there
is nothing to set up and nothing to collect.
Intended to be used via multiple inheritance alongside a concrete task class, and listed first: the check below reads the environment the rest of the chain assembled, so it has to run last.
File: convert.py
3.1.1.1. Methods#
- ConvertTask.add_bambu_cnoparse(path: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a C file bambu compiles for co-simulation but does not synthesize.
- Parameters:
path – Path(s) to the C file(s).
dataroot – The dataroot used to resolve relative paths.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
clobber – If True, replaces the list instead of appending to it.
- ConvertTask.add_bambu_fileinputdata(path: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a file the specification refers to, such as an IP’s Verilog source.
- Parameters:
path – Path(s) to the file(s).
dataroot – The dataroot used to resolve relative paths.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
clobber – If True, replaces the list instead of appending to it.
- ConvertTask.add_bambu_testbenchfileset(library: str, fileset: str, clobber: bool = False) None[source]#
Adds a fileset holding the testbench to simulate against.
The fileset carries either a testbench XML or a C/C++ file whose main() calls the top-level function; the MLIR front ends emit one of the latter alongside the kernel. Its files are kept out of the sources bambu synthesizes, so the testbench can sit in a fileset the project selected without being compiled into the design.
- Parameters:
library – Name of the library owning the fileset.
fileset – Name of the fileset.
clobber – If True, overwrites the existing list. Defaults to False.
- ConvertTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ConvertTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ConvertTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- ConvertTask.set_bambu_compiler(compiler: str, step: str | None = None, index: str | None = None) None[source]#
Sets the front end compiler bambu reads its inputs with.
bambu bundles several clang front ends and picks one by name, e.g.
I386_CLANG16. Which one matters for LLVM IR input: it has to be new enough to parse the IR the front end produced.- Parameters:
compiler – The compiler name. An empty string leaves bambu to pick.
step – The step to associate with this setting. Defaults to None.
index – The index to associate with this setting. Defaults to None.
- ConvertTask.set_bambu_componentslibrary(value: bool, step: str | None = None, index: str | None = None) None[source]#
Enables exporting Bambu’s standard RTL components as a separate library.
- Parameters:
value – True to export the components library.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
- ConvertTask.set_bambu_constraintsfile(path: str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None) None[source]#
Sets the Bambu constraints XML.
- Parameters:
path – Path to the constraints XML.
dataroot – The dataroot used to resolve relative paths.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
- ConvertTask.set_bambu_experimentalsetup(setup: str, step: str | None = None, index: str | None = None) None[source]#
Sets the Bambu experimental setup.
An experimental setup is a named preset of the optimization and scheduling options bambu synthesizes with;
BAMBU-BALANCED-MPis the one the SODA Synthesizer uses.- Parameters:
setup – The setup name. An empty string leaves bambu on its default.
step – The step to associate with this setting. Defaults to None.
index – The index to associate with this setting. Defaults to None.
- ConvertTask.set_bambu_memorychannels(channels: int, step: str | None = None, index: str | None = None) None[source]#
Sets the number of memory channels for the Bambu synthesizer.
This method configures the ‘memorychannels’ variable within the Bambu tool flow. It’s used to specify the number of independent memory channels the synthesized hardware should have.
- Parameters:
channels – The number of memory channels to configure.
step – The specific synthesis step to which this setting applies. If None, it applies globally. Defaults to None.
index – The index for the step, used if a step can have multiple configurations. Defaults to None.
- ConvertTask.set_bambu_memorypolicy(policy: str, step: str | None = None, index: str | None = None) None[source]#
Sets the Bambu memory allocation policy.
The policy decides how the kernel’s arrays are mapped onto memory, which is the choice that most changes what the generated RTL looks like: the default
NO_BRAMleaves them in external memory the accelerator reads through its channels, whileALL_BRAMputs them in block RAM inside it.- Parameters:
policy – The policy name.
step – The step to associate with this setting. Defaults to None.
index – The index to associate with this setting. Defaults to None.
- ConvertTask.set_bambu_printdot(value: bool, step: str | None = None, index: str | None = None) None[source]#
Enables dumping the tool’s internal graphs as graphviz .dot files.
- Parameters:
value – True to dump the graphs.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
- ConvertTask.set_bambu_simulate(value: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables simulating the generated RTL.
Simulation is what produces the cycle counts; without it bambu reports its area and timing estimates only. It needs a testbench, so setting this without one is an error rather than a silent no-op.
- Parameters:
value – Whether to simulate.
step – The step to associate with this setting. Defaults to None.
index – The index to associate with this setting. Defaults to None.
- ConvertTask.set_bambu_simulator(simulator: str, step: str | None = None, index: str | None = None) None[source]#
Sets the simulator bambu drives.
- Parameters:
simulator – One of ‘modelsim’, ‘xsim’ or ‘verilator’. bambu names these in upper case on its command line; the conversion happens on the way out.
step – The step to associate with this setting. Defaults to None.
index – The index to associate with this setting. Defaults to None.
- ConvertTask.set_bambu_technologyfile(path: str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None) None[source]#
Sets the Bambu technology XML.
- Parameters:
path – Path to the technology XML, e.g. an IP’s module library.
dataroot – The dataroot used to resolve relative paths.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
- ConvertTask.set_bambu_verilatorparallel(threads: int, step: str | None = None, index: str | None = None) None[source]#
Sets how many threads verilator simulates with.
Only reaches the command line when ‘simulator’ is verilator, which is the only simulator bambu passes this to.
- Parameters:
threads – Thread count, or 0 to emit the bare flag and let verilator decide.
step – The specific synthesis step to which this setting applies.
index – The specific index of the step.
3.1.1.2. Variables#
Parameters |
Type |
Help |
|
[file] |
C files bambu links into the testbench but does not synthesize, passed as –C-no-parse. Used by IP integration for the co-simulation half of an instrumentation IP. |
|
str |
Front end compiler bambu uses to read its inputs (e.g. I386_CLANG16). Empty leaves bambu to pick one. |
|
bool |
export Bambu’s standard RTL components as a separate library, which IP integration needs so the bound-in components resolve. |
|
file |
Bambu constraints XML, the second positional input in ‘bambu <source> [constraints] [technology]’. |
|
str |
Bambu experimental setup, which selects the preset of optimizations and scheduling options to synthesize with (e.g. BAMBU-BALANCED-MP). Empty leaves bambu on its own default. |
|
[file] |
extra files the specification refers to, passed as –file-input-data. For IP integration these are the Verilog sources of the components bound in from the technology XML. |
|
int<1..> |
Number of memory channels available |
|
str |
Bambu memory allocation policy, which decides how the kernel’s arrays are mapped onto memory (e.g. NO_BRAM, ALL_BRAM, EXT_PIPELINED_BRAM). |
|
bool |
dump the tool’s internal graphs as graphviz .dot files. Useful for seeing what the scheduler and binder did, and verbose enough that it is off by default. |
|
bool |
simulate the generated RTL. This is what produces the cycle counts; without it bambu reports area and timing estimates only. Needs a testbench. |
|
enum |
simulator bambu drives when ‘simulate’ is set. Allowed values: modelsim, verilator, xsim |
|
file |
Bambu technology XML describing modules to bind against, the third positional input. This is what an instrumentation IP’s module library is. |
|
[(str,str)] |
filesets holding the testbench to simulate against: either a testbench XML, or a C/C++ file whose main() calls the top-level function. Its files are excluded from the sources bambu synthesizes, so the testbench can live in a fileset the project has selected. |
|
int<0..> |
threads verilator simulates with, when ‘simulator’ is verilator. 0 emits the bare flag and lets verilator choose. |
3.1.1.3. Configuration#
Keypath |
Type |
Value |
str |
bambu |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
False |
|
int<1..> |
1 |
|
str |
NO_BRAM |
|
bool |
False |
|
bool |
False |
|
enum |
verilator |
|
int<0..> |
0 |
[str] |
>=2024.03 |
|
[str] |
--version |
3.2. bluespec#
Bluespec is a high-level hardware description language. It has a variety of advanced features including a powerful type system that can prevent errors prior to synthesis time, and its most distinguishing feature, Guarded Atomic Actions, allow you to define hardware components in a modular manner based on their invariants, and let the compiler pick a scheduler.
Documentation: B-Lang-org/bsc
Sources: B-Lang-org/bsc
Installation: B-Lang-org/bsc
File: __init__.py
3.2.1. convert#
A schema class that defines the parameters and methods for a single task in a compilation flow.
This class provides the framework for setting up, running, and post-processing a tool. It includes methods for managing executables, versions, runtime arguments, and file I/O.
File: convert.py
3.2.1.1. Configuration#
Keypath |
Type |
Value |
str |
bsc |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=2021.07 |
|
[str] |
-v |
3.3. builtin#
Builtin tools for SiliconCompiler
File: __init__.py
3.3.1. join#
Merges outputs from a list of input tasks.
File: join.py
3.3.1.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.2. maximum#
Selects the task with the maximum metric score from a list of inputs.
Sequence of operation:
Check list of input tasks to see if all metrics meets goals
Check list of input tasks to find global min/max for each metric
Select MAX value if all metrics are met.
Normalize the min value as sel = (val - MIN) / (MAX - MIN)
Return normalized value and task name
Meeting metric goals takes precedence over compute metric scores. Only goals with values set and metrics with weights set are considered in the calculation.
File: maximum.py
3.3.2.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.3. minimum#
Selects the task with the minimum metric score from a list of inputs.
Sequence of operation:
Check list of input tasks to see if all metrics meets goals
Check list of input tasks to find global min/max for each metric
Select MIN value if all metrics are met.
Normalize the min value as sel = (val - MIN) / (MAX - MIN)
Return normalized value and task name
Meeting metric goals takes precedence over compute metric scores. Only goals with values set and metrics with weights set are considered in the calculation.
File: minimum.py
3.3.3.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.4. mux#
Selects a task from a list of inputs.
The selector criteria provided is used to create a custom function for selecting the best step/index pair from the inputs. Metrics and weights are passed in and used to select the step/index based on the minimum or maximum score depending on the ‘op’ argument from [‘flowgraph’, flow, step, index, ‘args’] in the form ‘minimum(metric)’ or ‘maximum(metric)’.
The function can be used to bypass the flows weight functions for the purpose of conditional flow execution and verification.
File: mux.py
3.3.4.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.5. nop#
A no-operation that passes inputs to outputs.
File: nop.py
3.3.5.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.6. verify#
Tests an assertion on an input task.
The input to this task is verified to ensure that all assertions are True. If any of the assertions fail, False is returned. Assertions are passed in using [‘flowgraph’, flow, step, index, ‘args’] in the form ‘metric==0.0’. The allowed conditional operators are: >, <, >=, <=, ==
File: verify.py
3.3.6.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.7. importfiles#
A built-in task to import (copy) files and directories.
This task provides a mechanism to copy specified files and directories
from their source locations into the current task’s output directory
(outputs/), making them available for subsequent steps in the tool flow.
File: importfiles.py
3.3.7.1. Methods#
- ImportFilesTask.add_import_dir(directory: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds one or more directories to the list of items to import.
- Parameters:
directory (Union[List[Union[str, Path]], str, Path]) – The path(s) to the directory/directories to be imported.
dataroot (Optional[str]) – The dataroot to use for resolving relative paths. If None, the active dataroot is used. Defaults to None.
step (Optional[str]) – The step to associate this directory with. Defaults to the current step.
index (Optional[str]) – The index to associate this directory with. Defaults to the current index.
clobber (bool) – If True, existing directory entries for the specified step/index will be overwritten. If False, the new directory/directories will be appended. Defaults to False.
- ImportFilesTask.add_import_file(file: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds one or more files to the list of items to import.
- Parameters:
file (Union[List[Union[str, Path]], str, Path]) – The path(s) to the file(s) to be imported.
dataroot (Optional[str]) – The dataroot to use for resolving relative paths. If None, the active dataroot is used. Defaults to None.
step (Optional[str]) – The step to associate this file with. Defaults to the current step.
index (Optional[str]) – The index to associate this file with. Defaults to the current index.
clobber (bool) – If True, existing file entries for the specified step/index will be overwritten. If False, the new file(s) will be appended. Defaults to False.
3.3.7.2. Variables#
Parameters |
Type |
Help |
|
[dir] |
input directories to import |
|
[file] |
input files to import |
3.3.7.3. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
[dir] |
|
|
[file] |
|
3.3.8. filter#
A task for filtering files based on specified glob patterns.
This task determines which files to “keep” from a given set of inputs, passing only those that match the criteria to the outputs.
File: filter.py
3.3.8.1. Methods#
- FilterTask.add_filter_keep(keep: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds one or more glob patterns for files to keep.
- Parameters:
keep (Union[List[str], str]) – A single glob pattern or a list of glob patterns to identify which files should be kept.
step (Optional[str], optional) – The specific workflow step to apply this filter to. Defaults to None.
index (Optional[str], optional) – The specific index within the step to apply this filter to. Defaults to None.
clobber (bool, optional) – If True, existing ‘keep’ patterns are overwritten with the new value(s). If False, the new patterns are appended to the existing list. Defaults to False.
3.3.8.2. Variables#
Parameters |
Type |
Help |
|
[str] |
Glob of files to keep |
3.3.8.3. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.3.9. wait#
A wait task that stalls the flow until all inputs are available.
File: wait.py
3.3.9.1. Methods#
- static Wait.serialize_tool_tasks(flowgraph: Flowgraph, tool_name: str) None[source]#
Adds wait tasks between nodes of the same tool that could execute in parallel.
This method inserts Wait task nodes between nodes that use the same tool, but only when those nodes could execute in parallel (i.e., there’s no dependency path between them). This ensures that tool instances don’t execute in parallel, while avoiding unnecessary wait tasks for nodes that already have a dependency relationship.
The method modifies the flowgraph in-place by:
Finding all nodes that use the specified tool
For each pair of tool nodes with no dependency path, inserting a wait task
Using naming convention: {target_step}.wait (named after the node being delayed)
- Parameters:
flowgraph – The flowgraph to modify.
tool_name (str) – The name of the tool (e.g., ‘openroad’, ‘yosys’). All nodes using this tool will be serialized.
- Raises:
ValueError – If the flowgraph is invalid or tool_name is empty.
Example
>>> flow = Flowgraph("myflow") >>> flow.node("place1", openroad.Place, index=0) >>> flow.node("syn", yosys.Syn, index=0) >>> flow.node("place2", openroad.Place, index=1) >>> flow.edge("place1", "syn") >>> flow.edge("syn", "place2") >>> Wait.serialize_tool_tasks(flow, "openroad") >>> # No wait task added - place1 and place2 already have a dependency path
3.3.9.2. Configuration#
Keypath |
Type |
Value |
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
3.4. chisel#
Chisel is a hardware design language that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs. Chisel adds hardware construction primitives to the Scala programming language, providing designers with the power of a modern programming language to write complex, parameterizable circuit generators that produce synthesizable Verilog.
Documentation: https://www.chisel-lang.org/docs
Sources: chipsalliance/chisel
Installation: The Chisel plugin relies on having the Scala Build Tool (sbt) installed. Instructions: https://www.scala-sbt.org/download.html.
File: __init__.py
3.4.1. convert#
A schema class that defines the parameters and methods for a single task in a compilation flow.
This class provides the framework for setting up, running, and post-processing a tool. It includes methods for managing executables, versions, runtime arguments, and file I/O.
File: convert.py
3.4.1.1. Methods#
3.4.1.2. Data root#
Root |
Specifications |
chisel-tool |
|
3.4.1.3. Variables#
Parameters |
Type |
Help |
|
str |
Application name of the chisel program |
|
[str] |
Arguments for the chisel build |
|
str |
Output target directory name |
3.4.1.4. Configuration#
Keypath |
Type |
Value |
str |
sbt |
|
[file] |
|
|
[dir] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
chisel-output |
[str] |
>=1.5.5 |
|
[str] |
--version |
3.5. execute#
This tool is used to execute the output of a previous step. For example, if the flow contains a compile step which generates the next executable needed in the flow.
File: __init__.py
3.5.1. exec_input#
Execute the output of the previous step directly. This only works if the task receives a single file.
File: exec_input.py
3.5.1.1. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
3.6. genfasm#
Generate a FSAM file from the output of VPR
Documentation: https://docs.verilogtorouting.org/en/latest/utils/fasm/
Sources: verilog-to-routing/vtr-verilog-to-routing
File: __init__.py
3.6.1. bitstream#
Generates a bitstream
File: bitstream.py
3.6.1.1. Methods#
3.6.1.2. Variables#
Parameters |
Type |
Help |
|
bool |
true/false generate images of the design at the end of the task |
|
bool |
enable timing analysis |
|
enum |
The lookahead the router will use to estimate cost. Allowed values: classic, compressed_map, extended_map, map, simple |
|
int<1..> |
number of timing paths to report |
|
enum |
level of detail for timing reports: vpr –timing_report_detail. Allowed values: aggregated, debug, detailed, netlist |
3.6.1.3. Configuration#
Keypath |
Type |
Value |
str |
genfasm |
|
[file] |
|
|
[file] |
|
|
[str] |
^Error |
|
[str] |
^Warning |
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
int<1..> |
20 |
|
enum |
aggregated |
[str] |
>=v8.0.0-15021 |
|
[str] |
--version |
3.7. ghdl#
GHDL is an open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL. It allows you to analyse and elaborate sources for generating machine code from your design. Native program execution is the only way for high speed simulation.
Documentation: https://ghdl.readthedocs.io/en/latest
Sources: ghdl/ghdl
Installation: ghdl/ghdl
File: __init__.py
3.7.1. convert#
Imports VHDL and converts it to verilog
File: convert.py
3.7.1.1. Methods#
3.7.1.2. Variables#
Parameters |
Type |
Help |
|
bool |
add the -fsynopsys flag |
|
bool |
add the –latches flag |
3.7.1.3. Configuration#
Keypath |
Type |
Value |
str |
ghdl |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
output |
|
str |
v |
|
int<1..> |
1 |
|
|
bool |
False |
|
bool |
False |
[str] |
>=4.0.0-dev |
|
[str] |
--version |
3.8. graphviz#
Graphviz is open source graph visualization software. Graph visualization is a way of representing structural information as diagrams of abstract graphs and networks. It has important applications in networking, bioinformatics, software engineering, database and web design, machine learning, and in visual interfaces for other technical domains.
File: __init__.py
3.8.1. show#
Show a graphviz dot file
File: show.py
3.8.1.1. Methods#
- ShowTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ShowTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
3.8.1.2. Variables#
Parameters |
Type |
Help |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
3.8.1.3. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
False |
|
str |
xdot |
3.8.2. screenshot#
Generate a screenshot of a dot file
File: screenshot.py
3.8.2.1. Methods#
- ScreenshotTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ScreenshotTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
3.8.2.2. Variables#
Parameters |
Type |
Help |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
3.8.2.3. Configuration#
Keypath |
Type |
Value |
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
True |
|
str |
xdot |
3.9. gtkwave#
GTKWave is a fully featured GTK+ based wave viewer for Unix, Win32, and Mac OSX which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
Documentation: https://gtkwave.github.io/gtkwave/
Sources: gtkwave/gtkwave
Installation: gtkwave/gtkwave
File: __init__.py
3.9.1. show#
Show a VCD or FST file.
File: show.py
3.9.1.1. Methods#
- ShowTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ShowTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
3.9.1.2. Data root#
Root |
Specifications |
gtkwave |
|
3.9.1.3. Variables#
Parameters |
Type |
Help |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
3.9.1.4. Configuration#
Keypath |
Type |
Value |
str |
gtkwave |
|
enum |
tcl |
|
[dir] |
|
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
False |
|
str |
fst |
[str] |
>=3.3.116 |
|
[str] |
--version |
3.10. icarus#
Icarus is a verilog simulator with full support for Verilog IEEE-1364. Icarus can simulate synthesizable as well as behavioral Verilog.
Documentation: https://steveicarus.github.io/iverilog/
Sources: steveicarus/iverilog
Installation: steveicarus/iverilog
File: __init__.py
3.10.1. exec_cocotb#
Run a cocotb testbench against a compiled Icarus Verilog simulation.
This task takes a compiled .vvp file from the icarus compile task and executes it with the cocotb VPI module loaded, enabling Python-based testbenches to interact with the simulation.
The task requires cocotb to be installed in the Python environment. Test modules are specified by adding Python files to the fileset using the “python” filetype.
File: cocotb_exec.py
3.10.1.1. Methods#
- CocotbExecTask.add_plusarg(name: str, value: str, step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Appends a single plusarg to the existing list.
- Parameters:
name (str) – The plusarg name.
value (str) – The plusarg value.
step (str, optional) – The specific step to apply this configuration to.
index (str or int, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, replaces the current value. Defaults to False.
3.10.1.2. Variables#
Parameters |
Type |
Help |
|
int |
Random seed for cocotb test reproducibility. If not set, cocotb will generate a random seed. |
|
[(str,str)] |
List of plusarg (name, value) tuples to pass to the tool. |
3.10.1.3. Configuration#
Keypath |
Type |
Value |
str |
outputs/results.xml |
|
str |
|
|
str |
top |
|
str |
verilog |
|
str |
vvp |
|
[file] |
|
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
[str] |
>=10.3 |
|
[str] |
-V |
3.10.2. compile#
Compile the input verilog into a vvp file that can be simulated.
File: compile.py
3.10.2.1. Methods#
- CompileTask.set_icarus_timescale(unit: str, precision: str, step: str | None = None, index: int | str | None = None)[source]#
Sets the default simulation timescale.
When set, an Icarus command file containing
+timescale+<unit>/<precision>is auto-generated and passed to iverilog via-f. This sets the default time unit and precision for modules that do not specify their owntimescaledirective.
3.10.2.2. Variables#
Parameters |
Type |
Help |
|
(str,str) |
default simulation timescale as a (unit, precision) pair (e.g. (“1ns”, “1ps”)). When set, an Icarus command file with the corresponding “+timescale+” directive is auto-generated and passed to iverilog. |
|
bool |
Enable waveform tracing. When enabled, a VCD dump module is auto-generated and compiled with the design to capture all signals. |
|
enum |
Select Verilog language generation for Icarus to use. Legal values are “1995”, “2001”, “2001-noconfig”, “2005”, “2005-sv”, “2009”, or “2012”. See the corresponding “-g” flags in the Icarus manual for more “”information. Allowed values: 1995, 2001, 2001-noconfig, 2005, 2005-sv, 2009, 2012 |
3.10.2.3. Configuration#
Keypath |
Type |
Value |
str |
iverilog |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
False |
[str] |
>=10.3 |
|
[str] |
-V |
3.11. icepack#
Icepack converts an ASCII bitstream file to a .bin file for the ICE40 FPGA.
Documentation: https://clifford.at/icestorm
Sources: YosysHQ/icestorm
Installation: YosysHQ/icestorm
File: __init__.py
3.11.1. bitstream#
Generate a bitstream for the ICE40 FPGA
File: bitstream.py
3.11.1.1. Configuration#
Keypath |
Type |
Value |
str |
icepack |
|
[file] |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
3.12. keplerformal#
Kepler-Formal is a logic equivalence checking (LEC) tool that operates on verilog and the naja interchange format (najaeda/naja-if). It checks gate-level netlists combinationally, and RTL against a netlist sequentially.
Sources: keplertech/kepler-formal
File: __init__.py
3.12.1. lec#
LEC task using Kepler-formal for logical equivalence checking.
File: lec.py
3.12.1.1. Configuration#
Keypath |
Type |
Value |
str |
kepler-formal |
|
enum |
none |
|
str |
log |
|
enum |
none |
|
str |
log |
3.12.2. sec#
SEC task using Kepler-formal to check a netlist against the RTL it came from.
File: sec.py
3.12.2.1. Methods#
- SECTask.add_reset_port(name: str, active_value: int = 1, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a top-level reset port to hold active while the state settles.
- Parameters:
name (str) – Name of the top-level reset port.
active_value (int, optional) – Value that asserts it, 0 or 1. Defaults to 1.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, replaces the existing list.
3.12.2.2. Variables#
Parameters |
Type |
Help |
|
int |
Number of cycles to hold the reset ports active for. Has to cover the design’s reset distribution, so a reset that arrives through synchronizers or a pipeline needs more than one. |
|
[str] |
Top-level reset ports to hold active while the state settles, each given as ‘name=value’ with a value of 0 or 1. SEC cannot check a design whose observed outputs depend on state that no reset anchors, so without this it reports that it cannot run rather than proving an equivalence that would not hold for arbitrary initial state. |
3.12.2.3. Configuration#
Keypath |
Type |
Value |
str |
kepler-formal |
|
[file] |
|
|
enum |
none |
|
str |
log |
|
enum |
none |
|
str |
log |
|
|
int |
100 |
3.13. klayout#
Klayout is a production grade viewer and editor of GDSII and Oasis data with customizable Python and Ruby interfaces.
Documentation: https://www.klayout.de
Sources: KLayout/klayout
Installation: https://www.klayout.de/build.html
File: __init__.py
3.13.1. convert_drc_db#
Convert a DRC db from .lyrdb or .ascii to an openroad json marker file
File: convert_drc_db.py
3.13.1.1. Methods#
- ConvertDRCDBTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- ConvertDRCDBTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ConvertDRCDBTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ConvertDRCDBTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.1.2. Data root#
Root |
Specifications |
refdir |
|
3.13.1.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
3.13.1.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=0.28.0 |
|
[str] |
|
3.13.2. drc#
A Task with helper methods for tasks in a standard ASIC flow, providing easy access to PDK and standard cell library information.
File: drc.py
3.13.2.1. Methods#
- DRCTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- DRCTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- DRCTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- DRCTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.2.2. Data root#
Root |
Specifications |
refdir |
|
3.13.2.3. Variables#
Parameters |
Type |
Help |
|
str |
name of the DRC deck to run |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
3.13.2.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
tool,klayout,task,drc,var,drc_name |
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=0.28.0 |
|
[str] |
|
3.13.3. export#
Base class for KLayout tasks that read or write stream files.
Collects the stream format and timestamp settings shared by every task that produces a GDSII or OASIS file, along with the helpers for naming the files that follow from them.
File: export.py
3.13.3.1. Methods#
- ExportTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- ExportTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ExportTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ExportTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.3.2. Data root#
Root |
Specifications |
refdir |
|
3.13.3.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
bool |
true/false: true will cause KLayout to generate a screenshot of the layout |
|
(int<1..>,int<1..>) |
If greater than 1, splits the image into multiple segments along x-axis and y-axis |
|
int<0..> |
Width of lines in detailed screenshots |
|
float<0.0..> |
Margin around the design, as a percentage of its width on the left and right and of its height on the top and bottom |
|
int<1..3> |
Image oversampling used in detailed screenshots |
|
(int<1..>,int<1..>) |
Horizontal and vertical resolution in pixels |
|
enum |
Extension to use for stream generation. Allowed values: gds, oas |
|
bool |
Export GDSII with timestamps |
3.13.3.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(1, 1) |
|
int<0..> |
0 |
|
float<0.0..> |
1 |
|
int<1..3> |
2 |
|
(int<1..>,int<1..>) |
(4096, 4096) |
|
enum |
gds |
|
bool |
True |
[str] |
>=0.28.0 |
|
[str] |
|
3.13.4. image2stream#
A Task with helper methods for tasks in a standard ASIC flow, providing easy access to PDK and standard cell library information.
File: img2stream.py
3.13.4.1. Methods#
- Img2StreamTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- Img2StreamTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- Img2StreamTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- Img2StreamTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- Img2StreamTask.set_klayout_darkissolid(darkissolid: bool, step: str | None = None, index: str | None = None)[source]#
Sets the darkissolid flag for generation. :param darkissolid: Whether to treat dark colors as a solid. :type darkissolid: bool :param step: The specific step to apply this configuration to. :type step: str, optional :param index: The specific index to apply this configuration to. :type index: str, optional
- Img2StreamTask.set_klayout_invert(invert: bool, step: str | None = None, index: str | None = None)[source]#
Sets the invert flag for generation. :param invert: Whether to invert the image. :type invert: bool :param step: The specific step to apply this configuration to. :type step: str, optional :param index: The specific index to apply this configuration to. :type index: str, optional
- Img2StreamTask.set_klayout_layer(layer: int, purpose: int = 0, step: str | None = None, index: str | None = None)[source]#
Sets the layer for generation. :param layer: The layer to use. :type layer: int :param purpose: The purpose of the layer. :type purpose: int, optional :param step: The specific step to apply this configuration to. :type step: str, optional :param index: The specific index to apply this configuration to. :type index: str, optional
- Img2StreamTask.set_klayout_targetwidth(targetwidth: float, step: str | None = None, index: str | None = None)[source]#
Sets the target width for generation. :param targetwidth: The target width to use. :type targetwidth: float :param step: The specific step to apply this configuration to. :type step: str, optional :param index: The specific index to apply this configuration to. :type index: str, optional
3.13.4.2. Data root#
Root |
Specifications |
refdir |
|
3.13.4.3. Variables#
Parameters |
Type |
Help |
|
bool |
Treat dark colors as a solid |
|
(int,int) |
Layer/datatype to use for the FILL EXCLUSION boundary rectangle |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
enum |
Image format for input files. Allowed values: jpg, png |
|
bool |
Invert the polarity of the image |
|
(int,int) |
Stream layer to output image on |
|
float |
Minimum shape size for image processing |
|
(int,int) |
Layer/datatype to use for the OUTLINE boundary rectangle |
|
enum |
Extension to use for stream generation. Allowed values: gds, oas |
|
float |
Target width for the image |
|
bool |
Export GDSII with timestamps |
3.13.4.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
True |
|
enum |
png |
|
bool |
False |
|
enum |
gds |
|
bool |
True |
[str] |
>=0.28.0 |
|
[str] |
|
3.13.5. merge#
Klayout task to merge multiple GDS files and provide prefixing for cell names.
File: merge.py
3.13.5.1. Methods#
- Merge.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- Merge.add_klayout_merge(type: str, source0: str, source1: str, prefix: str, step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds a file to be merged with the reference file.
- Parameters:
type (str) – The fileset or input node to be merged.
prefix (str) – The prefix to apply during the merge.
source0 (str) – The first part of the source (library name or step).
source1 (str) – The second part of the source (fileset name or index).
step (Optional[str]) – The specific step to apply this configuration to.
index (Optional[Union[str, int]]) – The specific index to apply this configuration to.
clobber (bool, optional) –
If True, overwrites the existing list of merge files.
If False, appends to the list. Defaults to False.
- Merge.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- Merge.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- Merge.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- Merge.set_klayout_reference(type: str, source0: str, source1: str, step: str | None = None, index: int | str | None = None)[source]#
Sets the reference file for the merge operation. :param type: The reference fileset or input node. :type type: str :param source0: The first part of the source (library name or step). :type source0: str :param source1: The second part of the source (fileset name or index). :type source1: str :param step: The specific step to apply this configuration to. :type step: Optional[str] :param index: The specific index to apply this configuration to. :type index: Optional[Union[str, int]]
3.13.5.2. Data root#
Root |
Specifications |
refdir |
|
3.13.5.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
[(<fs,input>,str,str,str)] |
Fileset or input node to be merge with prefix, structured as (fs, library name, fileset) or (input, step, index) along with prefix string |
|
(<fs,input>,str,str) |
Reference fileset or input node for merge operation, structured as (fs, library name, fileset) or (input, step, index) |
3.13.5.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=0.28.0 |
|
[str] |
|
3.13.6. operations#
Perform a sequence of operations on a stream file.
Operations are objects, added in the order they should be applied. Each one
is created with its arguments, handed to add_klayout_operation,
and returns a handle whose setters can adjust it later. Operations can be repeated and
interleaved freely, and each node in a flow has its own sequence.
>>> from siliconcompiler.tools.klayout import operations
>>> task = operations.OperationsTask.find_task(project)
>>> task.add_klayout_operation(operations.DeleteLayers([(63, 0), (550, 26)]))
>>> task.add_klayout_operation(operations.Rotate(90))
>>> task.add_klayout_operation(operations.Write("rotated.gds"))
The handle can be kept and edited:
>>> strip = task.add_klayout_operation(operations.DeleteLayers(name="strip"))
>>> strip.add_layer(212, 51)
Available operations:
Merge– merge another stream into the top cellAdd– add another stream as a new cell instanceRotate– rotate the layoutFlatten– flatten the hierarchy of the top cellOutline– draw a box around the top cell bounding boxRenameTop– rename the top cellAddTop– add a new top cell above the current oneRenameCell– rename cellsSwapCell– replace instances of one cell with anotherDeleteLayers– delete all shapes on the given layersMergeShapes– merge overlapping shapes on the given layersConvertProperty– convert stream properties into text labelsWrite– write an intermediate copy of the layout
Each node writes outputs/<topmodule>.<stream>.gz regardless of the
operations performed, so Write is only needed to capture the layout
part way through a sequence. A node with no operations is skipped.
File: operations.py
3.13.6.1. Methods#
- OperationsTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- OperationsTask.add_klayout_operation(op: KLayoutOperation, step: str | None = None, index: int | str | None = None) KLayoutOperation[source]#
Appends an operation to the sequence performed by a node.
- Parameters:
op (
KLayoutOperation) – The operation to add.step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
- Returns:
The operation, bound to this task.
- OperationsTask.add_operation(op: KLayoutOperation | str, args: str | None = None, step: str | None = None, index: int | str | None = None) KLayoutOperation[source]#
Deprecated, use
add_klayout_operation.The
(operation, argument)form this used to take is translated where the translation is unambiguous, and rejected where the argument was a keypath to another parameter.
- OperationsTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- OperationsTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- OperationsTask.remove_klayout_operation(op: KLayoutOperation | str, step: str | None = None, index: int | str | None = None) bool[source]#
Removes an operation from the sequence performed by a node.
The parameters holding the operation’s values are deleted once no node refers to it any more.
- Parameters:
op (
KLayoutOperationor str) – The operation, or its name.step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
- Returns:
True if the operation was removed.
- OperationsTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.6.2. Data root#
Root |
Specifications |
refdir |
|
3.13.6.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
[(<add,add_top,convert_property,delete_layers,flatten,merge,merge_shapes,outline,rename,rename_cell,rotate,swap,write>,str)] |
ordered (operation type, operation name) pairs to perform |
|
enum |
Extension to use for stream generation. Allowed values: gds, oas |
|
bool |
Export GDSII with timestamps |
3.13.6.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
enum |
gds |
|
bool |
True |
[str] |
>=0.28.0 |
|
[str] |
|
3.13.7. screenshot#
Show a layout in kLayout
File: screenshot.py
3.13.7.1. Methods#
- ScreenshotTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- ScreenshotTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ScreenshotTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ScreenshotTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ScreenshotTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- ScreenshotTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.7.2. Data root#
Root |
Specifications |
refdir |
|
3.13.7.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
(int<1..>,int<1..>) |
If greater than 1, splits the image into multiple segments along x-axis and y-axis |
|
int<0..> |
Width of lines in detailed screenshots |
|
float<0.0..> |
Margin around the design, as a percentage of its width on the left and right and of its height on the top and bottom |
|
int<1..3> |
Image oversampling used in detailed screenshots |
|
(int<1..>,int<1..>) |
Horizontal and vertical resolution in pixels |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
3.13.7.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
(int<1..>,int<1..>) |
(1, 1) |
|
int<0..> |
0 |
|
float<0.0..> |
1 |
|
int<1..3> |
2 |
|
(int<1..>,int<1..>) |
(4096, 4096) |
|
bool |
True |
|
str |
ascii |
[str] |
>=0.28.0 |
|
[str] |
|
3.13.8. show#
Show a layout in kLayout
File: show.py
3.13.8.1. Methods#
- ShowTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- ShowTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ShowTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ShowTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ShowTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- ShowTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.8.2. Data root#
Root |
Specifications |
refdir |
|
3.13.8.3. Variables#
Parameters |
Type |
Help |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
3.13.8.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
bool |
False |
|
str |
ascii |
[str] |
>=0.28.0 |
|
[str] |
|
3.13.9. stream2lef#
A Task with helper methods for tasks in a standard ASIC flow, providing easy access to PDK and standard cell library information.
File: stream2lef.py
3.13.9.1. Methods#
- Stream2LefTask.add_klayout_hidelayers(layer: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds one or more layers to hide when displaying or screenshotting a layout.
These are hidden in addition to the layers named by
KLayoutPDK.add_klayout_hidelayers(). A layer can be named either by name or as a<layer>/<datatype>pair.- Parameters:
layer (Union[str, List[str]]) – The layer name or a list of layer names.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list of hidden layers. If False, appends to the list. Defaults to False.
- Stream2LefTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- Stream2LefTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- Stream2LefTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.13.9.2. Data root#
Root |
Specifications |
refdir |
|
3.13.9.3. Variables#
Parameters |
Type |
Help |
|
str |
Class name for the LEF macro |
|
[str] |
list of layers to hide, in addition to the layers hidden by the PDK |
|
{str} |
Cells to ignore during export |
|
str |
Site name for the LEF macro |
|
enum |
Extension to use for stream generation. Allowed values: gds, oas |
|
{enum} |
Symmetry for the LEF macro, e.g. X Y R90. Allowed values: R90, X, Y |
3.13.9.4. Configuration#
Keypath |
Type |
Value |
str |
1 |
|
str |
klayout |
|
enum |
json |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
ERROR |
|
[str] |
(WARNING|warning) |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
BLOCK |
|
enum |
gds |
|
{enum} |
|
[str] |
>=0.28.0 |
|
[str] |
|
3.14. magic#
Magic is a chip layout viewer, editor, and circuit verifier with built in DRC and LVS engines.
Documentation: https://opencircuitdesign.com/magic/userguide.html
Installation: RTimothyEdwards/magic
Sources: RTimothyEdwards/magic
File: __init__.py
3.14.1. drc#
A schema class that defines the parameters and methods for a single task in a compilation flow.
This class provides the framework for setting up, running, and post-processing a tool. It includes methods for managing executables, versions, runtime arguments, and file I/O.
File: drc.py
3.14.1.1. Data root#
Root |
Specifications |
magic |
|
3.14.1.2. Variables#
Parameters |
Type |
Help |
|
[file] |
lef files to read |
3.14.1.3. Configuration#
Keypath |
Type |
Value |
str |
magic |
|
enum |
tcl |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
^Error |
|
[str] |
warning |
|
{str} |
asic,pdk |
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
[str] |
>=8.3.196 |
|
[str] |
--version |
3.14.2. extspice#
Extract spice netlists from a GDS file for simulation use
File: extspice.py
3.14.2.1. Data root#
Root |
Specifications |
magic |
|
3.14.2.2. Variables#
Parameters |
Type |
Help |
|
[file] |
lef files to read |
3.14.2.3. Configuration#
Keypath |
Type |
Value |
str |
magic |
|
enum |
tcl |
|
[str] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
^Error |
|
[str] |
warning |
|
{str} |
asic,pdk |
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
[str] |
>=8.3.196 |
|
[str] |
--version |
3.15. montage#
ImageMagick is a free and open-source software suite for displaying, converting, and editing raster image and vector image files. It can read and write over 200 image file formats, and can support a wide range of image manipulation operations, such as resizing, cropping, and color correction. Use the montage program to create a composite image by combining several separate images. The images are tiled on the composite image optionally adorned with a border, frame, image name, and more
Documentation: https://imagemagick.org/
Sources: ImageMagick/ImageMagick
Installation: ImageMagick/ImageMagick
File: __init__.py
3.15.1. convert#
Downsamples an input image and writes it out as a PNG or JPG.
Useful for producing a lightweight, shareable preview from a large merged
screenshot. The input image format is auto-detected from the file provided
upstream (PNG is assumed when it cannot be determined); the output is
<design>.<format> scaled by the configured resize geometry.
File: convert.py
3.15.1.1. Methods#
3.15.1.2. Variables#
Parameters |
Type |
Help |
|
enum |
Output image format. Allowed values: bmp, gif, jpeg, jpg, png, ppm, svg, tif, tiff, webp |
|
int |
Output image quality (1-100) |
|
str |
ImageMagick resize geometry applied to the image, e.g. ‘50%’ or ‘2048x2048’ (aspect ratio is preserved). Leave empty to only convert the format without resizing. |
3.15.1.3. Configuration#
Keypath |
Type |
Value |
str |
convert |
|
[file] |
|
|
[file] |
|
|
{str} |
tool,montage,task,convert,var,format |
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
enum |
png |
[str] |
>=6.9.0 |
|
[str] |
-version |
3.15.2. tile#
Tiles input images into a single output image.
File: tile.py
3.15.2.1. Methods#
3.15.2.2. Variables#
Parameters |
Type |
Help |
|
(int<1..>,int<1..>) |
Number of bins along the (x, y)-axis. If left unset, the grid size is auto-detected from the incoming tile images. |
3.15.2.3. Configuration#
Keypath |
Type |
Value |
str |
montage |
|
{str} |
tool,montage,task,tile,var,bins |
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=6.9.0 |
|
[str] |
-version |
3.16. mlir#
MLIR is a compiler infrastructure, part of the LLVM project, built around reusable dialects and progressive lowering between them. It is the substrate the SODA Synthesizer’s front end (soda-opt) is written against, and the tools in this module are the upstream LLVM binaries that the SODA flow drives directly:
mlir-opt– runs pass pipelines over a.mlirfile.mlir-translate– translates the LLVM dialect into LLVM IR (.ll).clang– compiles a C support module to LLVM IR.llvm-link– links LLVM IR modules, used to supply the runtime helpers the bufferized code calls.
Because soda-opt is an out-of-tree MLIR project that links against MLIR’s C++
libraries, both have to come from the same llvm-project revision. The install
script pins that revision; a distribution mlir-tools package will generally
not match it.
Documentation: https://mlir.llvm.org
Sources: llvm/llvm-project
Installation: sc-install mlir
File: __init__.py
3.16.1. pipeline#
Runs a textual pass pipeline, as -pass-pipeline=....
This is the form to use when the passes have to be nested under the operation they run on, which the flag list cannot express.
A subclass says what it runs by overriding _pipeline(), which becomes
the parameter’s default; a user can still replace it with
set_mlir_pipeline().
File: opt.py
3.16.1.1. Methods#
- PipelineTask.add_mlir_dialectplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load dialects from.
- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
- PipelineTask.add_mlir_passplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load passes from.
The passes it provides can then be named like any other, in either
set_mlir_pipeline()oradd_mlir_passes(). A library that provides a dialect as well has to be named toadd_mlir_dialectplugin()too –mlir-optlooks for a separate entry point for each, and only warns when the one it wants is absent.- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
3.16.1.2. Variables#
Parameters |
Type |
Help |
|
[file] |
MLIR plugin libraries to load dialects from |
|
[file] |
MLIR plugin libraries to load passes from |
|
str |
textual MLIR pass pipeline, passed as -pass-pipeline |
3.16.1.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-opt |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.2. passes#
Runs an ordered list of individual pass flags.
This is the form to use when the passes are a flat sequence, which is most of them, and the only form that can mix module-level and function-level passes.
A subclass says what it runs by overriding _passes(), which becomes
the parameter’s default; a user can still change it with
add_mlir_passes().
File: opt.py
3.16.2.1. Methods#
- PassesTask.add_mlir_dialectplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load dialects from.
- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
- PassesTask.add_mlir_passes(passes: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Appends one or more pass flags to the end of the pass list.
- Parameters:
passes (str or list of str) – The pass flag(s) to append, in the order they should run, e.g.
["-canonicalize", "-cse"].step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list – which is how a task’s own passes are replaced rather than added to. Defaults to False.
- PassesTask.add_mlir_passplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load passes from.
The passes it provides can then be named like any other, in either
set_mlir_pipeline()oradd_mlir_passes(). A library that provides a dialect as well has to be named toadd_mlir_dialectplugin()too –mlir-optlooks for a separate entry point for each, and only warns when the one it wants is absent.- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
3.16.2.2. Variables#
Parameters |
Type |
Help |
|
[file] |
MLIR plugin libraries to load dialects from |
|
[str] |
ordered list of mlir-opt pass flags, e.g. -canonicalize |
|
[file] |
MLIR plugin libraries to load passes from |
3.16.2.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-opt |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.3. tosa2linalg#
Lowers a TOSA module to linalg on tensors.
This is the first half of the SODA front end’s tosa_to_linalg step: the
named TOSA operations become their linalg equivalents, still operating on
tensor values. BufferizeTask runs afterwards to put them on
buffers.
A pipeline rather than a flag list because every pass here runs on a
func.func.
File: opt.py
3.16.3.1. Methods#
- TosaToLinalgTask.add_mlir_dialectplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load dialects from.
- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
- TosaToLinalgTask.add_mlir_passplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load passes from.
The passes it provides can then be named like any other, in either
set_mlir_pipeline()oradd_mlir_passes(). A library that provides a dialect as well has to be named toadd_mlir_dialectplugin()too –mlir-optlooks for a separate entry point for each, and only warns when the one it wants is absent.- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
3.16.3.2. Variables#
Parameters |
Type |
Help |
|
[file] |
MLIR plugin libraries to load dialects from |
|
[file] |
MLIR plugin libraries to load passes from |
|
str |
textual MLIR pass pipeline, passed as -pass-pipeline |
3.16.3.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-opt |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
builtin.module(func.func(tosa-to-arith, tosa-to-tensor, tosa-to-linalg-named, tosa-to-linalg)) |
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.4. bufferize#
Bufferizes linalg on tensors into linalg on memrefs.
This is the second half of the SODA front end’s tosa_to_linalg step. The
result is the 02_linalg.mlir of the SODA flow: linalg operations on
buffers, with the function results turned into out-parameters, which is the
form soda-opt outlines a kernel from.
File: opt.py
3.16.4.1. Methods#
- BufferizeTask.add_mlir_dialectplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load dialects from.
- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
- BufferizeTask.add_mlir_passes(passes: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Appends one or more pass flags to the end of the pass list.
- Parameters:
passes (str or list of str) – The pass flag(s) to append, in the order they should run, e.g.
["-canonicalize", "-cse"].step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list – which is how a task’s own passes are replaced rather than added to. Defaults to False.
- BufferizeTask.add_mlir_passplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load passes from.
The passes it provides can then be named like any other, in either
set_mlir_pipeline()oradd_mlir_passes(). A library that provides a dialect as well has to be named toadd_mlir_dialectplugin()too –mlir-optlooks for a separate entry point for each, and only warns when the one it wants is absent.- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
3.16.4.2. Variables#
Parameters |
Type |
Help |
|
[file] |
MLIR plugin libraries to load dialects from |
|
[str] |
ordered list of mlir-opt pass flags, e.g. -canonicalize |
|
[file] |
MLIR plugin libraries to load passes from |
3.16.4.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-opt |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
[str] |
|
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.5. linalg2llvm#
Lowers linalg all the way to the LLVM dialect.
This is the reference software lowering of the SODA flow (its
linalg_to_llvm step), which produces a module that can be translated and
executed on a CPU. It is not part of the hardware path – there,
soda-opt does the lowering, so that a kernel is outlined
and optimized for high-level synthesis on the way down.
File: opt.py
3.16.5.1. Methods#
- LinalgToLLVMTask.add_mlir_dialectplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load dialects from.
- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
- LinalgToLLVMTask.add_mlir_passes(passes: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Appends one or more pass flags to the end of the pass list.
- Parameters:
passes (str or list of str) – The pass flag(s) to append, in the order they should run, e.g.
["-canonicalize", "-cse"].step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list – which is how a task’s own passes are replaced rather than added to. Defaults to False.
- LinalgToLLVMTask.add_mlir_passplugin(plugin: List[str | Path] | str | Path, dataroot: str | None = None, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds a plugin library to load passes from.
The passes it provides can then be named like any other, in either
set_mlir_pipeline()oradd_mlir_passes(). A library that provides a dialect as well has to be named toadd_mlir_dialectplugin()too –mlir-optlooks for a separate entry point for each, and only warns when the one it wants is absent.- Parameters:
plugin (str, Path or list) – Path(s) to the plugin shared object.
dataroot (str, optional) – The dataroot used to resolve relative paths.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, replaces the list instead of appending to it. Defaults to False.
3.16.5.2. Variables#
Parameters |
Type |
Help |
|
[file] |
MLIR plugin libraries to load dialects from |
|
[str] |
ordered list of mlir-opt pass flags, e.g. -canonicalize |
|
[file] |
MLIR plugin libraries to load passes from |
3.16.5.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-opt |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
[str] |
|
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.6. translate#
Translates an MLIR module into LLVM IR with mlir-translate.
This is the hand-off from the MLIR world to the LLVM IR that the HLS tool
reads: the input has already been lowered to the LLVM dialect (by
soda-opt or by
LinalgToLLVMTask), and this task
emits the textual .ll for it.
The translated module is then filtered: MLIR brackets the buffers it
allocates on the stack with llvm.stacksave / llvm.stackrestore
intrinsics, which an HLS backend has no notion of. Those lines are dropped,
which is what the SODA flow does with sed at the same point.
File: translate.py
3.16.6.1. Methods#
- TranslateTask.add_mlir_stripintrinsics(intrinsics: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds an intrinsic to the list stripped from the translated IR.
- Parameters:
intrinsics (str or list of str) – Intrinsic name(s) to strip.
step (str, optional) – The step to apply this configuration to.
index (str, optional) – The index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list. Clobbering with an empty list keeps the translated module exactly as
mlir-translateemitted it. Defaults to False.
3.16.6.2. Variables#
Parameters |
Type |
Help |
|
str |
mlir-translate action to perform |
|
[str] |
LLVM intrinsics to strip from the translated IR. Any line mentioning one of these is removed, which drops both the declaration and the calls. |
3.16.6.3. Configuration#
Keypath |
Type |
Value |
str |
mlir-translate |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
--mlir-to-llvmir |
|
[str] |
|
[str] |
>=19.1.0 |
|
[str] |
--version |
3.16.7. runtime#
Compiles a C support module into LLVM IR for linking into a kernel.
Bufferized MLIR lowers memref.copy to a call to memrefCopy, which
upstream expects to come from MLIR’s runner support library. An HLS backend
has no runtime to link against, so the definition has to be merged into the
module itself; this task produces it, and
LinkTask does the merge.
The bundled memref_copy.c is the default, but the source is a parameter:
any C file whose LLVM IR should end up inside the kernel goes here, and the
module it produces is named after it.
The task has no design input – it compiles a source of its own – so it is an entry node of any flow that uses it, running alongside the front end rather than after it.
memref_copy.c is vendored from PNNL’s soda-benchmarks
(scripts/lib/memref_copy.c), which is Apache-2.0 with LLVM exceptions.
It differs from MLIR’s own memrefCopy in avoiding the dynamic alloca
that HLS backends reject.
File: compile.py
3.16.7.1. Methods#
3.16.7.2. Data root#
Root |
Specifications |
siliconcompiler |
|
3.16.7.3. Variables#
Parameters |
Type |
Help |
|
file |
C source compiled to LLVM IR for linking into the kernel. The module it produces is named after it, so a source of ‘helpers.c’ yields ‘helpers.ll’. |
3.16.7.4. Configuration#
Keypath |
Type |
Value |
str |
clang |
|
[file] |
|
|
{str} |
tool,mlir,task,runtime,var,source |
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
file |
|
[str] |
>=15.0.0 |
|
[str] |
--version |
3.16.8. link#
Links support modules into a kernel’s LLVM IR with llvm-link.
Bufferized MLIR lowers memref.copy to a call to memrefCopy, which an
HLS backend has no runtime to resolve, so the definition compiled by
RuntimeTask is merged into the
module.
Every upstream module other than the kernel itself is a candidate, whatever it is called, so a flow can stage more than one support module without this task knowing their names.
The merge only happens when the kernel actually references
requiredsymbol without defining it – which the unoptimized flow usually
does not – so a kernel that has no use for the helpers is not given a dead
function to carry into synthesis. In that case this is a plain
llvm-link pass-through.
File: link.py
3.16.8.1. Methods#
- LinkTask.set_mlir_runtimesupport(value: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables linking the staged support modules.
With this off the task is a plain
llvm-linkpass-through, and a kernel that calls into the helpers reaches the HLS tool with the call unresolved.
3.16.8.2. Variables#
Parameters |
Type |
Help |
|
str |
only link the support modules when the kernel references this symbol without defining it. Empty links them unconditionally. |
|
bool |
link the staged support modules into the kernel |
3.16.8.3. Configuration#
Keypath |
Type |
Value |
str |
llvm-link |
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
memrefCopy |
|
bool |
True |
[str] |
>=19.1.0 |
|
[str] |
--version |
3.17. netgen#
Netgen is a tool for comparing netlists. By comparing a Verilog netlist with one extracted from a circuit layout, it can be used to perform LVS verification.
Documentation: https://www.opencircuitdesign.com/netgen/
Installation: RTimothyEdwards/netgen
Sources: RTimothyEdwards/netgen
File: __init__.py
3.17.1. lvs#
Perform LVS on the supplied netlists
File: lvs.py
3.17.1.1. Data root#
Root |
Specifications |
netgen |
|
3.17.1.2. Configuration#
Keypath |
Type |
Value |
str |
netgen |
|
enum |
tcl |
|
[file] |
|
|
[str] |
|
|
[dir] |
|
|
[str] |
^Warning: |
|
{str} |
asic,pdk |
|
[file] |
|
|
enum |
log |
|
str |
errors |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
[str] |
>=1.5.192 |
|
[str] |
-batch |
3.18. nextpnr#
nextpnr is a vendor neutral FPGA place and route tool with support for the ICE40, ECP5, and Nexus devices from Lattice.
Documentation: YosysHQ/nextpnr
Sources: YosysHQ/nextpnr
Installation: YosysHQ/nextpnr
File: __init__.py
3.18.1. apr#
Perform automated place and route on FPGAs
File: apr.py
3.18.1.1. Configuration#
Keypath |
Type |
Value |
str |
nextpnr-ice40 |
|
[file] |
|
|
[file] |
|
|
{str} |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
[str] |
>=0.2 |
|
[str] |
--version |
3.19. openroad#
OpenROAD is an automated physical design platform for integrated circuit design with a complete set of features needed to translate a synthesized netlist to a tapeout ready GDSII.
Documentation: https://openroad.readthedocs.io/en/latest/
Sources: The-OpenROAD-Project/OpenROAD
Installation: The-OpenROAD-Project/OpenROAD
File: __init__.py
3.19.1. antenna_repair#
Perform antenna repair
File: antenna_repair.py
3.19.1.1. Methods#
- AntennaRepairTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- AntennaRepairTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- AntennaRepairTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- AntennaRepairTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- AntennaRepairTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- AntennaRepairTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- AntennaRepairTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- AntennaRepairTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.1.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.1.3. Variables#
Parameters |
Type |
Help |
|
bool |
true/false, flag to indicate whether to check for antenna violations |
|
int<1..> |
maximum number of repair iterations to use during antenna repairs |
|
float<0.0..100.0> |
adds a margin to the antenna ratios (0 - 100) |
|
bool |
true/false, flag to indicate whether to repair antenna violations |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
true/false, use decap fillers along with non-decap fillers |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true allow global routing to finish with congestion |
|
str |
maximum layer to use for global routing of clock nets |
|
str |
minimum layer to use for global routing of clock nets |
|
int<0..> |
macro extension distance in number of gcells, this can be useful when the detailed router needs additional space to avoid DRCs |
|
int<1..> |
maximum number of iterations to use in global routing when attempting to solve overflow |
|
bool |
true/false, when true global routing will consider wire resistance |
|
int |
random seed for global routing, unset uses the tool default |
|
str |
maximum layer to use for global routing of signals |
|
str |
minimum layer to use for global routing of signals |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.1.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
int<1..> |
3 |
|
float<0.0..100.0> |
0 |
|
bool |
True |
|
bool |
True |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
str |
metal7 |
|
str |
metal2 |
|
int<0..> |
0 |
|
int<1..> |
100 |
|
bool |
False |
|
str |
metal7 |
|
str |
metal2 |
|
bool |
True |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.2. clock_tree_synthesis#
Perform clock tree synthesis
File: clock_tree_synthesis.py
3.19.2.1. Methods#
- CTSTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- CTSTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- CTSTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- CTSTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- CTSTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- CTSTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- CTSTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CTSTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.2.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.2.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
bool |
perform level balancing in clock tree synthesis |
|
float<0.0..> |
clustering distance to use during clock tree synthesis in microns |
|
int<1..> |
number of instances in a cluster to use during clock tree synthesis |
|
float<0.0..> |
maximum distance between buffers during clock tree synthesis in microns |
|
bool |
make clock tree synthesis aware of obstructions |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement in microns, 0 will result in the tool default maximum displacement |
|
bool |
true/false, legalize with the legacy diamond search engine instead of the negotiation-based legalizer the tool now defaults to |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
detailed placement cell padding in number of sites |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.2.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
True |
|
float<0.0..> |
100 |
|
int<1..> |
30 |
|
float<0.0..> |
100 |
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(0, 0) |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.3. detailed_placement#
Perform detailed placement
File: detailed_placement.py
3.19.3.1. Methods#
- DetailedPlacementTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- DetailedPlacementTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- DetailedPlacementTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- DetailedPlacementTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- DetailedPlacementTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- DetailedPlacementTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- DetailedPlacementTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedPlacementTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.3.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.3.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement in microns, 0 will result in the tool default maximum displacement |
|
bool |
true/false, legalize with the legacy diamond search engine instead of the negotiation-based legalizer the tool now defaults to |
|
bool |
true/false, when true the detailed placement optimization will be performed |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement optimization in microns, 0 will result in the tool default maximum displacement |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
detailed placement cell padding in number of sites |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.3.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(0, 0) |
|
bool |
False |
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(5, 5) |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.4. detailed_route_antenna_repair#
Repair antenna violations on the detailed routing
Checks the routed design for antenna violations and, while any remain, inserts diodes and reroutes the affected nets. This is the only point in the flow where the antenna ratios being checked are the ones the design ships with, since earlier checks see global route guides rather than real wires.
Derives from the detailed routing task so the reroute uses exactly the detailed router configuration the initial route used. Repair needs the main library to declare an antenna cell; without one only the check runs.
Setting ant_margin above zero also enables the repair on a design the check
reports as clean, since the point of a margin is to fix nets that are merely
close to the antenna limit.
File: detailed_route.py
3.19.4.1. Methods#
- DetailedRouteAntennaRepairTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- DetailedRouteAntennaRepairTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- DetailedRouteAntennaRepairTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- DetailedRouteAntennaRepairTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- DetailedRouteAntennaRepairTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- DetailedRouteAntennaRepairTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- DetailedRouteAntennaRepairTask.set_openroad_antrerouteiterations(iterations: int, step: str | None = None, index: int | str | None = None)[source]#
Sets the maximum number of antenna repair and reroute iterations.
This is the outer loop around
repair_antennasanddetailed_route, and is distinct fromant_iterations, which bounds the iterations inside a singlerepair_antennascall.Use
ant_repairto turn the repair off entirely.
- DetailedRouteAntennaRepairTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteAntennaRepairTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.4.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.4.3. Variables#
Parameters |
Type |
Help |
|
bool |
true/false, flag to indicate whether to check for antenna violations |
|
float<0.0..100.0> |
adds a margin to the antenna ratios (0 - 100) |
|
bool |
true/false, flag to indicate whether to repair antenna violations |
|
int<1..> |
maximum number of antenna repair and reroute iterations to perform |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
[str] |
list of default vias to use for detail routing |
|
[str] |
list of layers to treat as unidirectional regardless of what the tech lef specifies |
|
bool |
true/false, use decap fillers along with non-decap fillers |
|
bool |
true/false, when true turns off via generation in detailed router and only uses the specified tech vias |
|
int<1..64> |
end iteration for detailed routing |
|
str |
when set this specifies to the detailed router the specific process node |
|
str |
layer to repair PDN vias on |
|
int<1..64> |
reporting interval in steps for generating a DRC report. |
|
str |
bottom layer to allow vias inside pins |
|
str |
top layer to allow vias inside pins |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.4.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
float<0.0..100.0> |
0 |
|
bool |
True |
|
int<1..> |
5 |
|
bool |
True |
|
bool |
True |
|
bool |
False |
|
int<1..64> |
5 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.5. detailed_route#
Perform detailed routing
File: detailed_route.py
3.19.5.1. Methods#
- DetailedRouteTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- DetailedRouteTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- DetailedRouteTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- DetailedRouteTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- DetailedRouteTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- DetailedRouteTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- DetailedRouteTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- DetailedRouteTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.5.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.5.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
[str] |
list of default vias to use for detail routing |
|
[str] |
list of layers to treat as unidirectional regardless of what the tech lef specifies |
|
bool |
true/false, when true turns off via generation in detailed router and only uses the specified tech vias |
|
int<1..64> |
end iteration for detailed routing |
|
str |
when set this specifies to the detailed router the specific process node |
|
str |
layer to repair PDN vias on |
|
int<1..64> |
reporting interval in steps for generating a DRC report. |
|
str |
bottom layer to allow vias inside pins |
|
str |
top layer to allow vias inside pins |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.5.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
int<1..64> |
5 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.6. endcap_tapcell_insertion#
Perform endcap and tap cell insertion
File: endcap_tapcell_insertion.py
3.19.6.1. Methods#
- EndCapTapCellTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- EndCapTapCellTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- EndCapTapCellTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- EndCapTapCellTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- EndCapTapCellTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- EndCapTapCellTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- EndCapTapCellTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- EndCapTapCellTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.6.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.6.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.6.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.7. fillercell_insertion#
Perform filler cell insertion
File: fillercell_insertion.py
3.19.7.1. Methods#
- FillCellTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- FillCellTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- FillCellTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- FillCellTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- FillCellTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- FillCellTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- FillCellTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillCellTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.7.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.7.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement in microns, 0 will result in the tool default maximum displacement |
|
bool |
true/false, use decap fillers along with non-decap fillers |
|
bool |
true/false, legalize with the legacy diamond search engine instead of the negotiation-based legalizer the tool now defaults to |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
detailed placement cell padding in number of sites |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.7.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(0, 0) |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.8. fillmetal_insertion#
Perform fill metal insertion
File: fillmetal_insertion.py
3.19.8.1. Methods#
- FillMetalTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- FillMetalTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- FillMetalTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- FillMetalTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- FillMetalTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- FillMetalTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- FillMetalTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- FillMetalTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.8.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.8.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
str |
name of the metal fill deck to use, this is only required when the PDK ships more than one deck |
|
bool |
true/false, when true enables adding fill, if enabled by the PDK, to the design |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.8.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.9. global_placement#
Perform global placement
File: global_placement.py
3.19.9.1. Methods#
- GlobalPlacementTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- GlobalPlacementTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- GlobalPlacementTask.add_openroad_pplconstraints(constraints: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds pin placement constraints scripts.
- Parameters:
constraints (Union[str, List[str]]) – The constraint file(s) to add.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list. Defaults to False.
- GlobalPlacementTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- GlobalPlacementTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- GlobalPlacementTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- GlobalPlacementTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- GlobalPlacementTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalPlacementTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.9.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.9.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
true/false, when true multibit clustering will be performed. |
|
bool |
true/false, when true scan chains will be inserted. |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when enabled a global placement skips the initial placement, before the main global placement pass. |
|
bool |
true/false, when enabled a global placement is performed without considering the impact of the pin placements |
|
bool |
true/false, when true global placement will consider the routability of the design |
|
bool |
true/false, when true global placement will consider the timing performance of the design |
|
float<0.0..0.99> |
percent of remaining area density to apply above uniform density (0.00 - 0.99) |
|
str |
maximum layer to use for global routing of clock nets |
|
str |
minimum layer to use for global routing of clock nets |
|
int<0..> |
macro extension distance in number of gcells, this can be useful when the detailed router needs additional space to avoid DRCs |
|
bool |
true/false, when true global routing will consider wire resistance |
|
str |
maximum layer to use for global routing of signals |
|
str |
minimum layer to use for global routing of signals |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
global placement cell padding in number of sites |
|
[str] |
layers to use for horizontal pins |
|
[str] |
layers to use for vertical pins |
|
float<0.0..1.0> |
global placement density (0.0 - 1.0) |
|
str |
corner to use for power analysis |
|
[str] |
additional arguments to pass along to the pin placer. |
|
[file] |
pin placement constraints scripts. |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
enum |
clock domain handling for scan chains, clock_mix builds chains that mix clocks and edges, no_mix builds chains holding a single clock and edge. Allowed values: clock_mix, no_mix |
|
str |
pattern of the scan chain enable port |
|
str |
pattern of the scan chain in port |
|
int<1..> |
maximum number of scan chains, in no_mix this limit is applied per clock/edge pair |
|
int<1..> |
maximum number of cells in a scan chain |
|
str |
pattern of the scan chain out port |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.9.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
bool |
True |
|
bool |
True |
|
float<0.0..0.99> |
0.0 |
|
str |
metal7 |
|
str |
metal2 |
|
int<0..> |
0 |
|
bool |
False |
|
str |
metal7 |
|
str |
metal2 |
|
bool |
True |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
[str] |
metal5 |
|
[str] |
metal6 |
|
float<0.0..1.0> |
0.5 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
enum |
clock_mix |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.10. global_route#
Perform global routing
File: global_route.py
3.19.10.1. Methods#
- GlobalRouteTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- GlobalRouteTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- GlobalRouteTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- GlobalRouteTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- GlobalRouteTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- GlobalRouteTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- GlobalRouteTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- GlobalRouteTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.10.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.10.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
[str] |
list of default vias to use for detail routing |
|
[str] |
list of layers to treat as unidirectional regardless of what the tech lef specifies |
|
str |
when set this specifies to the detailed router the specific process node |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true allow global routing to finish with congestion |
|
str |
maximum layer to use for global routing of clock nets |
|
str |
minimum layer to use for global routing of clock nets |
|
int<0..> |
macro extension distance in number of gcells, this can be useful when the detailed router needs additional space to avoid DRCs |
|
int<1..> |
maximum number of iterations to use in global routing when attempting to solve overflow |
|
bool |
true/false, when true global routing will consider wire resistance |
|
int |
random seed for global routing, unset uses the tool default |
|
str |
maximum layer to use for global routing of signals |
|
str |
minimum layer to use for global routing of signals |
|
bool |
true/false, when true perform pin access before global routing |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.10.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
str |
metal7 |
|
str |
metal2 |
|
int<0..> |
0 |
|
int<1..> |
100 |
|
bool |
False |
|
str |
metal7 |
|
str |
metal2 |
|
bool |
False |
|
bool |
True |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.11. init_floorplan#
Perform floorplanning and initial pin placements.
This task handles the initialization of the floorplan, including macro placement snapping strategies, cleaning up synthesis artifacts (buffers/dead logic), and defining padring or bumpmap configurations.
File: init_floorplan.py
3.19.11.1. Methods#
- InitFloorplanTask.add_openroad_bumpmapfileset(fileset: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds fileset(s) used to generate the bump map for flip-chip or 3D designs.
- Parameters:
fileset – A string name or list of names representing the bumpmap filesets.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing bumpmap fileset list. If False, appends to the existing list.
- InitFloorplanTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- InitFloorplanTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- InitFloorplanTask.add_openroad_padringfileset(fileset: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds fileset(s) used to generate the I/O pad ring.
- Parameters:
fileset – A string name or list of names representing the padring filesets.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing padring fileset list. If False, appends to the existing list.
- InitFloorplanTask.add_openroad_placementblockage(x0: float, y0: float, x1: float, y1: float, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a placement blockage defined by the coordinates of its lower-left (x0, y0) and upper-right (x1, y1) corners.
- Parameters:
x0 – X-coordinate of the lower-left corner of the blockage.
y0 – Y-coordinate of the lower-left corner of the blockage.
x1 – X-coordinate of the upper-right corner of the blockage.
y1 – Y-coordinate of the upper-right corner of the blockage.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing placement blockage list. If False, appends to the existing list.
- InitFloorplanTask.add_openroad_pplconstraints(constraints: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds pin placement constraints scripts.
- Parameters:
constraints (Union[str, List[str]]) – The constraint file(s) to add.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list. Defaults to False.
- InitFloorplanTask.add_openroad_routingblockage(layer: str, x0: float, y0: float, x1: float, y1: float, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a routing blockage defined by the coordinates of its lower-left (x0, y0) and upper-right (x1, y1) corners.
- Parameters:
layer – The routing layer to which this blockage applies.
x0 – X-coordinate of the lower-left corner of the blockage.
y0 – Y-coordinate of the lower-left corner of the blockage.
x1 – X-coordinate of the upper-right corner of the blockage.
y1 – Y-coordinate of the upper-right corner of the blockage.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing routing blockage list. If False, appends to the existing list.
- InitFloorplanTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- InitFloorplanTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- InitFloorplanTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- InitFloorplanTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- InitFloorplanTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_assertallpinsplaced(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables an assertion that all pins are placed after floorplanning.
- Parameters:
enable – True to assert that all pins are placed, False to disable this assertion.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_removebuffers(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the removal of buffers inserted during synthesis.
- Parameters:
enable – True to remove synthesis buffers, False to keep them.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_removedeadlogic(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the removal of logic that does not drive a primary output.
- Parameters:
enable – True to remove dead logic, False to keep it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- InitFloorplanTask.set_openroad_snapstrategy(snap: str, step: str | None = None, index: str | None = None)[source]#
Sets the snapping strategy for macro placement.
- Parameters:
snap – The snapping mode. Options are typically ‘none’, ‘site’, or ‘grid’.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.11.2. Data root#
Root |
Specifications |
openroad-ref |
|
sc-common |
|
siliconcompiler |
|
3.19.11.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
bool |
assert that all pins are placed |
|
[str] |
filesets to generate a bumpmap |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
enum |
Snapping strategy to use when placing macros. Allowed values: grid, none, site |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
[str] |
filesets to generate a padring |
|
[str] |
layers to use for horizontal pins |
|
[str] |
layers to use for vertical pins |
|
[((float,float),(float,float))] |
Placement blockage coordinates |
|
str |
corner to use for power analysis |
|
[str] |
additional arguments to pass along to the pin placer. |
|
[file] |
pin placement constraints scripts. |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
[(str,(float,float),(float,float))] |
Routing blockage coordinates |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
file |
TCL file defining pin constraints for use with OpenROAD. |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.11.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
enum |
site |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
[str] |
metal5 |
|
[str] |
metal6 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
file |
|
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.12. macro_placement#
Macro placement
File: macro_placement.py
3.19.12.1. Methods#
- MacroPlacementTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- MacroPlacementTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- MacroPlacementTask.add_openroad_mplconstraints(constraints: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds constraints scripts for macro placement.
- Parameters:
constraints (Union[str, List[str]]) – The constraint file(s) to add.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list. Defaults to False.
- MacroPlacementTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- MacroPlacementTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- MacroPlacementTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- MacroPlacementTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- MacroPlacementTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_mplfence(llx: float, lly: float, urx: float, ury: float, step: str | None = None, index: str | None = None)[source]#
Defines the global fence bounding box coordinates.
- Parameters:
llx (float) – Lower-left X coordinate (microns).
lly (float) – Lower-left Y coordinate (microns).
urx (float) – Upper-right X coordinate (microns).
ury (float) – Upper-right Y coordinate (microns).
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
- MacroPlacementTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.12.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.12.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when enabled a global placement skips the initial placement, before the main global placement pass. |
|
bool |
true/false, when enabled a global placement is performed without considering the impact of the pin placements |
|
bool |
true/false, when true global placement will consider the routability of the design |
|
bool |
true/false, when true global placement will consider the timing performance of the design |
|
float<0.0..0.99> |
percent of remaining area density to apply above uniform density (0.00 - 0.99) |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
(float<0.0..>,float<0.0..>) |
macro halo to use when performing automated macro placement ([x, y] in microns) |
|
float<0.0..> |
Weight for the area of current floorplan |
|
float<0.0..> |
Weight for the boundary, or how far the hard macro clusters are from boundaries |
|
float<0.0..> |
Weight for the boundary, or how far the hard macro clusters are from boundaries. Note that mixed macro clusters are not pushed, thus not considered in this cost. |
|
bool |
Flag to enable bus planning |
|
[file] |
constraints script for macro placement |
|
(float<0.0..>,float<0.0..>,float<0.0..>,float<0.0..>) |
Defines the global fence bounding box coordinates (llx, lly, urx, ury) |
|
float<0.0..> |
Weight for fence cost, or how far the macro is from zero fence violation |
|
float<0.0..> |
Weight for guidance cost or clusters being placed near specified regions if users provide such constraints |
|
float<0.0..> |
Weight for macro blockage, or the overlapping instances of the macro |
|
bool |
flag to enable or disable the creation of blockages during macro placement |
|
int<1..> |
maximum number of instances to use while clustering for macro placement |
|
int<1..> |
maximum depth of physical hierarchical tree |
|
int<1..> |
maximum number of macros to use while clustering for macro placement |
|
float<0.0..> |
Specifies the minimum aspect ratio of its width to height of a standard cell cluster |
|
int<1..> |
minimum number of instances to use while clustering for macro placement |
|
int<1..> |
minimum number of macros to use while clustering for macro placement |
|
float<0.0..> |
Weight for the notch, or the existence of dead space that cannot be used for placement & routing |
|
float<0.0..> |
Weight for violating the fixed outline constraint, meaning that all clusters should be placed within the shape of their parent cluster |
|
float |
Specifies the target dead space percentage, which influences the utilization of standard cell clusters |
|
float<0.0..> |
Weight for half-perimeter wirelength |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
global placement cell padding in number of sites |
|
float<0.0..1.0> |
global placement density (0.0 - 1.0) |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.12.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
bool |
True |
|
bool |
True |
|
float<0.0..0.99> |
0.0 |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(22.4, 15.12) |
|
bool |
False |
|
bool |
False |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
float<0.0..1.0> |
0.5 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.13. metrics#
Extract metrics
File: metrics.py
3.19.13.1. Methods#
- MetricsTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- MetricsTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- MetricsTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- MetricsTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- MetricsTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- MetricsTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- MetricsTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- MetricsTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.13.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.13.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.13.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.14. calibrate_pex#
Calibrate OpenROAD’s pre-route parasitic estimate against a golden OpenRCX extraction on a routed design.
For each PEX corner this task extracts the design with the PDK’s OpenRCX
deck, walks the extracted parasitic segments to accumulate per-layer
capacitance / resistance / length (the inputs used to calibrate
OpenROADPDK.add_openroad_rccorrection()), and records a per-net estimate-vs-golden
capacitance report so the estimation error can be scored before and after
calibration. It is a terminal analysis node and produces no design views.
The estimate honors the PDK’s rccorrection like any node: the derivation
survey runs against a PDK with no correction (uncorrected estimate – and the
derived factor is independent of it anyway, since it divides the golden sums
by the stored rclayer), while the --score step applies the derived
correction to the whole flow and re-runs to measure the residual error.
File: pex.py
3.19.14.1. Methods#
- CalibratePEXTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- CalibratePEXTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- CalibratePEXTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- CalibratePEXTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- CalibratePEXTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- CalibratePEXTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- CalibratePEXTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CalibratePEXTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.14.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.14.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
{str} |
set of pex corners to calibrate against |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.14.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
False |
|
(int<1..>,int<1..>) |
(16, 16) |
|
{str} |
typical |
|
str |
typical |
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=26Q3-23 |
|
[str] |
-version |
3.19.15. rcx_bench#
Builds the bench_wires pattern design used to characterize the OpenRCX
extraction deck.
Shares the bench script with PEXBenchTask - it writes the pattern
verilog netlist and DEF for a third-party “golden” PEX tool and the OpenRCX
extract step. The difference is the top layer: this deck-generation bench
defaults max_layer to the PDK’s rcx_maxlayer when set, because some
PDKs cannot bench all the way to the top metal and the golden tool only needs
the layers the deck characterizes. (The PEX estimate bench has no such limit
and benches to the top routing layer.) An explicit max_layer still wins.
File: pex.py
3.19.15.1. Methods#
- ORXBenchTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- ORXBenchTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ORXBenchTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ORXBenchTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.19.15.2. Data root#
Root |
Specifications |
openroad-ref |
|
3.19.15.3. Variables#
Parameters |
Type |
Help |
|
float<0.0..> |
length of the bench wires |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
str |
maximum routing layer to generate the bench for; defaults to the top routing layer in the tech |
3.19.15.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
float<0.0..> |
100 |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.16. rcx_extract#
Convert a third-party “golden” SPEF of the bench_wires patterns into a calibrated OpenRCX rules deck.
File: pex.py
3.19.16.1. Methods#
- ORXExtractTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- ORXExtractTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ORXExtractTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ORXExtractTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.19.16.2. Data root#
Root |
Specifications |
openroad-ref |
|
3.19.16.3. Variables#
Parameters |
Type |
Help |
|
str |
Parasitic corner to generate RCX file for |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
3.19.16.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
str |
<corner> |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.17. pex_bench_extract#
Extract the bench_wires patterns with the PDK’s OpenRCX deck to derive
the initial per-layer estimate model (resistance ohm/um, capacitance F/um).
Walks the per-segment parasitics (the same method as the calibrate task) to
produce one row per (corner, layer). These values seed
OpenROADPDK.add_openroad_rclayer(); the design survey then refines
them with OpenROADPDK.add_openroad_rccorrection().
File: pex.py
3.19.17.1. Methods#
- PEXBenchExtractTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PEXBenchExtractTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PEXBenchExtractTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PEXBenchExtractTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.19.17.2. Data root#
Root |
Specifications |
openroad-ref |
|
3.19.17.3. Variables#
Parameters |
Type |
Help |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
{str} |
set of pex corners to derive the estimate model for |
3.19.17.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
{str} |
typical |
[str] |
>=26Q3-23 |
|
[str] |
-version |
3.19.18. pex_bench#
Generate synthetic wire patterns (bench_wires) for deriving the initial
per-layer parasitic estimate model.
Reads only the tech LEF and writes a pattern verilog netlist and DEF, which
PEXBenchExtractTask re-reads and extracts. The two are separate
tasks because a same-process bench_wires followed by
extract_parasitics fails (RCX-0487); the DEF must be re-read in a fresh
process.
This is the same bench used to seed the OpenRCX deck-generation flow
(ORXBenchTask); the highest routing layer defaults to the top of
the tech when max_layer is not set.
File: pex.py
3.19.18.1. Methods#
- PEXBenchTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PEXBenchTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PEXBenchTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PEXBenchTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.19.18.2. Data root#
Root |
Specifications |
openroad-ref |
|
3.19.18.3. Variables#
Parameters |
Type |
Help |
|
float<0.0..> |
length of the bench wires |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
str |
maximum routing layer to generate the bench for; defaults to the top routing layer in the tech |
3.19.18.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
1 |
|
|
float<0.0..> |
100 |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.19. open3dblox#
Open a 3D view of the design in openroad.
File: open.py
3.19.19.1. Methods#
- Open3DBloxTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- Open3DBloxTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- Open3DBloxTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- Open3DBloxTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- Open3DBloxTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- Open3DBloxTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- Open3DBloxTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- Open3DBloxTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- Open3DBloxTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- Open3DBloxTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.19.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.19.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.19.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
str |
typical |
|
bool |
False |
|
str |
3dbx |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=26Q2-565 |
|
[str] |
-version |
3.19.20. open#
Open a design in openroad.
Reuses the APR input handling so the same odb/def/vg/sdc selection logic
(including enablehier linking and load_sdcs) is applied. When a
showfilepath is provided (e.g. via sc-show -open) the file plus any
sibling sdc files from the source node are copied into inputs at
runtime.
File: open.py
3.19.20.1. Methods#
- OpenTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- OpenTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- OpenTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- OpenTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- OpenTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- OpenTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- OpenTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- OpenTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- OpenTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- OpenTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.20.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.20.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.20.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
str |
typical |
|
bool |
False |
|
str |
vg |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.21. pin_placement#
Perform IO pin placement refinement
File: pin_placement.py
3.19.21.1. Methods#
- PinPlacementTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PinPlacementTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- PinPlacementTask.add_openroad_pplconstraints(constraints: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds pin placement constraints scripts.
- Parameters:
constraints (Union[str, List[str]]) – The constraint file(s) to add.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, overwrites the existing list. Defaults to False.
- PinPlacementTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- PinPlacementTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PinPlacementTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PinPlacementTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- PinPlacementTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PinPlacementTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.21.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.21.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when enabled a global placement skips the initial placement, before the main global placement pass. |
|
bool |
true/false, when enabled a global placement is performed without considering the impact of the pin placements |
|
bool |
true/false, when true global placement will consider the routability of the design |
|
bool |
true/false, when true global placement will consider the timing performance of the design |
|
float<0.0..0.99> |
percent of remaining area density to apply above uniform density (0.00 - 0.99) |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
global placement cell padding in number of sites |
|
[str] |
layers to use for horizontal pins |
|
[str] |
layers to use for vertical pins |
|
float<0.0..1.0> |
global placement density (0.0 - 1.0) |
|
str |
corner to use for power analysis |
|
[str] |
additional arguments to pass along to the pin placer. |
|
[file] |
pin placement constraints scripts. |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.21.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
bool |
True |
|
bool |
True |
|
float<0.0..0.99> |
0.0 |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
[str] |
metal5 |
|
[str] |
metal6 |
|
float<0.0..1.0> |
0.5 |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.22. power_grid#
Perform power grid insertion and connectivity analysis
File: power_grid.py
3.19.22.1. Methods#
- PowerGridTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PowerGridTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- PowerGridTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- PowerGridTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PowerGridTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PowerGridTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- PowerGridTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.22.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.22.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
float<0.0..> |
if > 0, applies a blockage in multiples of the routing pitch to each fixed pin to ensure there is room for routing. |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
bool |
enable power grid generation |
|
[(str,str)] |
power grid definition filesets |
|
str |
corner to use for power analysis |
|
[str] |
list of nets where a missing terminal is acceptable |
|
bool |
true/false, when true enables IR drop analysis |
|
[str] |
list of nets to skip power grid analysis on |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.22.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
float<0.0..> |
0 |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
bool |
True |
|
str |
typical |
|
bool |
True |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.23. irdrop_analysis#
Performs static IR drop analysis on the power grid using OpenROAD.
This task utilizes the OpenROAD PDN (Power Distribution Network) analysis capabilities (PSM) to calculate static IR drop based on instance power consumption and grid resistance.
File: power_grid_analysis.py
3.19.23.1. Methods#
- PowerGridAnalysisTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PowerGridAnalysisTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- PowerGridAnalysisTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- PowerGridAnalysisTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PowerGridAnalysisTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PowerGridAnalysisTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- PowerGridAnalysisTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PowerGridAnalysisTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.23.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.23.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
float<0.0..> |
Resistance value to add to the power grid model to account for external factors (e.g., package, PCB). |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
(float<0.0..>,float<0.0..>) |
Resolution of the IR drop heatmap grid (x_step, y_step). |
|
[(str,float)] |
List of (instance_name, power_value) tuples to override specific instance power consumption. |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
{str} |
Set of specific power/ground nets to analyze (e.g., VDD, VSS). |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
bool |
true/false, when true enables IR drop analysis |
|
[str] |
list of nets to skip power grid analysis on |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
float<0.0..100.0> |
Fraction (0.0-100.0) of power source bumps to simulate disconnected/failing bumps. |
|
int |
Random seed used for determining which power bumps to disconnect. |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.23.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
float<0.0..> |
0 |
|
bool |
False |
|
(float<0.0..>,float<0.0..>) |
(10, 10) |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
bool |
True |
|
str |
typical |
|
float<0.0..100.0> |
0.0 |
|
int |
123 |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=v2.0-26866 |
|
[str] |
-version |
3.19.24. rdlroute#
Perform floorplanning, pin placements, macro placements and power grid generation
File: rdlroute.py
3.19.24.1. Methods#
- RDLRouteTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- RDLRouteTask.add_openroad_rdlroute(file: str | Path, dataroot: str | None = None, step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds a RDL routing script to the design.
- Parameters:
file (str) – The path to the RDL routing script.
dataroot (str, optional) – The data root to apply this configuration to.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
clobber (bool, optional) – If True, replaces any existing RDL routing scripts for the specified dataroot, step, and index. If False, appends the new script to the existing list.
- RDLRouteTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- RDLRouteTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- RDLRouteTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
3.19.24.2. Data root#
Root |
Specifications |
openroad-ref |
|
3.19.24.3. Variables#
Parameters |
Type |
Help |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
str |
name of the metal fill deck to use, this is only required when the PDK ships more than one deck |
|
bool |
true/false, when true enables adding fill, if enabled by the PDK, to the design |
|
[file] |
RDL routing scripts |
3.19.24.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.25. repair_design#
Perform timing repair and tie-off cell insertion
File: repair_design.py
3.19.25.1. Methods#
- RepairDesignTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- RepairDesignTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- RepairDesignTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- RepairDesignTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- RepairDesignTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- RepairDesignTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- RepairDesignTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairDesignTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.25.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.25.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
float<0.0..> |
maximum distance between tie high/low cells in microns |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
true/false, when true enables adding buffers to the input ports |
|
bool |
true/false, when true enables adding buffers to the output ports |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max capacitance repairs in percent (0 - 100) |
|
str |
default corner to use for parasitic extraction |
|
bool |
true/false, when true only cells sharing the same liberty footprint are considered when swapping gates |
|
float<0.0..100.0> |
maximum percentage of the core area the resizer is allowed to use, unset uses the tool default |
|
float<0.0..> |
maximum length a wire may reach before design repair inserts a buffer, unset lets the tool pick the length that avoids slew violations |
|
file |
file used to specify the parasitics for estimation |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max slew repairs in percent (0 - 100) |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.25.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
float<0.0..> |
0 |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
bool |
False |
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
str |
typical |
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.26. post_route_repair_timing#
Repair timing on a globally routed design
Runs design rule violation repair, setup repair and hold repair against the global routing parasitics, each followed by an incremental global route and detailed placement so the design stays routed and legal. A final worst negative slack pass then targets the single worst endpoint using only threshold voltage swaps and rerouting, which improves the critical path while leaving placement and routing almost untouched.
Repairing an already routed design changes both quality of results and runtime,
so the task is opt-in: rsz_enable must be set for it to run. Otherwise the
node is skipped and its inputs are forwarded unchanged.
File: repair_timing.py
3.19.26.1. Methods#
- PostRouteRepairTimingTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- PostRouteRepairTimingTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- PostRouteRepairTimingTask.add_openroad_rszphases(phases: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds phases to the explicit order of setup optimization phases.
Phases are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- PostRouteRepairTimingTask.add_openroad_rszsequence(moves: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds moves to the explicit order of setup optimization moves.
Moves are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- PostRouteRepairTimingTask.add_openroad_rszwnssequence(moves: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds moves to the worst negative slack repair pass move order.
Moves are appended in call order. Unlike the other move lists this one has a non-empty default, so adding extends
vt_swap rerouterather than replacing it – pass clobber to supply the whole sequence instead.- Parameters:
- PostRouteRepairTimingTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- PostRouteRepairTimingTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- PostRouteRepairTimingTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- PostRouteRepairTimingTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- PostRouteRepairTimingTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- PostRouteRepairTimingTask.set_openroad_skipwnsrepair(skip: bool, step: str | None = None, index: int | str | None = None)[source]#
Enables or disables skipping the worst negative slack repair pass.
This pass minimizes placement and routing disturbance and is only meaningful once global routing has been performed.
3.19.26.2. Data root#
Root |
Specifications |
siliconcompiler |
|
3.19.26.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement in microns, 0 will result in the tool default maximum displacement |
|
bool |
true/false, use decap fillers along with non-decap fillers |
|
bool |
true/false, legalize with the legacy diamond search engine instead of the negotiation-based legalizer the tool now defaults to |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
str |
maximum layer to use for global routing of clock nets |
|
str |
minimum layer to use for global routing of clock nets |
|
int<0..> |
macro extension distance in number of gcells, this can be useful when the detailed router needs additional space to avoid DRCs |
|
bool |
true/false, when true global routing will consider wire resistance |
|
str |
maximum layer to use for global routing of signals |
|
str |
minimum layer to use for global routing of signals |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
detailed placement cell padding in number of sites |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
true/false, when true hold repair is allowed to insert buffers that cause setup violations |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max capacitance repairs in percent (0 - 100) |
|
str |
default corner to use for parasitic extraction |
|
bool |
true/false, when true perform timing repair using the global routing parasitics |
|
float |
specifies the margin to apply when performing hold repair |
|
bool |
true/false, when true only cells sharing the same liberty footprint are considered when swapping gates |
|
float<0.0..100.0> |
maximum number of buffers hold repair may insert, as a percentage of the instance count, unset uses the tool default |
|
int<1..> |
maximum number of optimization iterations timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of optimization passes timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of repairs setup repair may make in a single pass, unset uses the tool default |
|
float<0.0..100.0> |
maximum percentage of the core area the resizer is allowed to use, unset uses the tool default |
|
float<0.0..> |
maximum length a wire may reach before design repair inserts a buffer, unset lets the tool pick the length that avoids slew violations |
|
file |
file used to specify the parasitics for estimation |
|
[enum] |
explicit order of setup optimization phases, an empty list uses the tool default, note the tool appends its critical threshold voltage swap phase to any of its legacy phases. Allowed values: CRIT_VT_SWAP, ENDPOINT_FANIN, GLOBAL_SIZING, LAST_GASP, LEGACY, REROUTE, STARTPOINT_FANOUT, TNS, WNS, WNS_CONE, WNS_PATH |
|
float<0.0..100.0> |
percentage of paths to attempt to recover power (0 - 100) |
|
float<0.0..100.0> |
percentage of violating nets to attempt to repair (0 - 100) |
|
[enum] |
explicit order of setup optimization moves, an empty list uses the tool default. Allowed values: buffer, clone, reroute, size, size_down, size_down_fanout, sizeup, sizeup_match, split, swap, unbuffer, vt_swap |
|
float |
specifies the margin to apply when performing setup repair |
|
bool |
true/false, skip buffer removal optimization |
|
bool |
true/false, skip rebuffering and load splitting optimizations |
|
bool |
true/false, skip the final critical threshold voltage (VT) swap optimization |
|
bool |
skip design rule violation repair |
|
bool |
true/false, skip the greedy gate resizing pass that runs at the end of setup repair to pick up any slack the main optimization left |
|
bool |
true/false, skip gate cloning optimization |
|
bool |
skip hold timing repair |
|
bool |
true/false, skip pin swap optimization |
|
bool |
skip power recovery |
|
bool |
skip setup timing repair |
|
bool |
true/false, skip down-sizing gates that are not on the critical path |
|
bool |
true/false, skip threshold voltage (VT) swap optimization |
|
bool |
skip the disturbance minimizing worst negative slack repair pass. This pass only applies once global routing has been performed |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max slew repairs in percent (0 - 100) |
|
[enum] |
order of optimization moves to use for the worst negative slack repair pass, an empty list uses the tool default. Allowed values: buffer, clone, reroute, size, size_down, size_down_fanout, sizeup, sizeup_match, split, swap, unbuffer, vt_swap |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.26.4. Configuration#
Keypath |
Type |
Value |
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(0, 0) |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
int<0..> |
0 |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
bool |
False |
|
float |
0.0 |
|
bool |
True |
|
float<0.0..100.0> |
100 |
|
float<0.0..100.0> |
100 |
|
float |
0.0 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
[enum] |
|
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
3.19.27. repair_timing#
Perform setup and hold timing repairs
File: repair_timing.py
3.19.27.1. Methods#
- RepairTimingTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- RepairTimingTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- RepairTimingTask.add_openroad_rszphases(phases: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds phases to the explicit order of setup optimization phases.
Phases are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- RepairTimingTask.add_openroad_rszsequence(moves: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds moves to the explicit order of setup optimization moves.
Moves are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- RepairTimingTask.add_openroad_rszwnssequence(moves: str | List[str], step: str | None = None, index: int | str | None = None, clobber: bool = False)[source]#
Adds moves to the worst negative slack repair pass move order.
Moves are appended in call order. Unlike the other move lists this one has a non-empty default, so adding extends
vt_swap rerouterather than replacing it – pass clobber to supply the whole sequence instead.- Parameters:
- RepairTimingTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- RepairTimingTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- RepairTimingTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- RepairTimingTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- RepairTimingTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- RepairTimingTask.set_openroad_skipwnsrepair(skip: bool, step: str | None = None, index: int | str | None = None)[source]#
Enables or disables skipping the worst negative slack repair pass.
This pass minimizes placement and routing disturbance and is only meaningful once global routing has been performed.
3.19.27.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.27.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
(float<0.0..>,float<0.0..>) |
maximum cell movement in detailed placement in microns, 0 will result in the tool default maximum displacement |
|
bool |
true/false, use decap fillers along with non-decap fillers |
|
bool |
true/false, legalize with the legacy diamond search engine instead of the negotiation-based legalizer the tool now defaults to |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
int<0..> |
detailed placement cell padding in number of sites |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
true/false, when true hold repair is allowed to insert buffers that cause setup violations |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max capacitance repairs in percent (0 - 100) |
|
str |
default corner to use for parasitic extraction |
|
float |
specifies the margin to apply when performing hold repair |
|
bool |
true/false, when true only cells sharing the same liberty footprint are considered when swapping gates |
|
float<0.0..100.0> |
maximum number of buffers hold repair may insert, as a percentage of the instance count, unset uses the tool default |
|
int<1..> |
maximum number of optimization iterations timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of optimization passes timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of repairs setup repair may make in a single pass, unset uses the tool default |
|
float<0.0..100.0> |
maximum percentage of the core area the resizer is allowed to use, unset uses the tool default |
|
float<0.0..> |
maximum length a wire may reach before design repair inserts a buffer, unset lets the tool pick the length that avoids slew violations |
|
file |
file used to specify the parasitics for estimation |
|
[enum] |
explicit order of setup optimization phases, an empty list uses the tool default, note the tool appends its critical threshold voltage swap phase to any of its legacy phases. Allowed values: CRIT_VT_SWAP, ENDPOINT_FANIN, GLOBAL_SIZING, LAST_GASP, LEGACY, REROUTE, STARTPOINT_FANOUT, TNS, WNS, WNS_CONE, WNS_PATH |
|
float<0.0..100.0> |
percentage of paths to attempt to recover power (0 - 100) |
|
float<0.0..100.0> |
percentage of violating nets to attempt to repair (0 - 100) |
|
[enum] |
explicit order of setup optimization moves, an empty list uses the tool default. Allowed values: buffer, clone, reroute, size, size_down, size_down_fanout, sizeup, sizeup_match, split, swap, unbuffer, vt_swap |
|
float |
specifies the margin to apply when performing setup repair |
|
bool |
true/false, skip buffer removal optimization |
|
bool |
true/false, skip rebuffering and load splitting optimizations |
|
bool |
true/false, skip the final critical threshold voltage (VT) swap optimization |
|
bool |
skip design rule violation repair |
|
bool |
true/false, skip the greedy gate resizing pass that runs at the end of setup repair to pick up any slack the main optimization left |
|
bool |
true/false, skip gate cloning optimization |
|
bool |
skip hold timing repair |
|
bool |
true/false, skip pin swap optimization |
|
bool |
skip power recovery |
|
bool |
skip setup timing repair |
|
bool |
true/false, skip down-sizing gates that are not on the critical path |
|
bool |
true/false, skip threshold voltage (VT) swap optimization |
|
bool |
skip the disturbance minimizing worst negative slack repair pass. This pass only applies once global routing has been performed |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max slew repairs in percent (0 - 100) |
|
[enum] |
order of optimization moves to use for the worst negative slack repair pass, an empty list uses the tool default. Allowed values: buffer, clone, reroute, size, size_down, size_down_fanout, sizeup, sizeup_match, split, swap, unbuffer, vt_swap |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.27.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
(float<0.0..>,float<0.0..>) |
(0, 0) |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
int<0..> |
0 |
|
str |
typical |
|
{enum} |
|
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
str |
typical |
|
float |
0.0 |
|
bool |
False |
|
float<0.0..100.0> |
100 |
|
float<0.0..100.0> |
100 |
|
float |
0.0 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
float<0.0..100.0> |
0.0 |
|
[enum] |
|
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.28. screenshot#
Generate a PNG file from a layout file
File: screenshot.py
3.19.28.1. Methods#
- ScreenshotTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- ScreenshotTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- ScreenshotTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- ScreenshotTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ScreenshotTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ScreenshotTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ScreenshotTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- ScreenshotTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- ScreenshotTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ScreenshotTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.28.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.28.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
true/false, include the images in reports/ |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
int<1..> |
Vertical resolution of the screenshot image |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.28.4. Configuration#
Keypath |
Type |
Value |
str |
offscreen |
|
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
{enum} |
|
|
str |
typical |
|
int<1..> |
1024 |
|
bool |
True |
|
str |
vg |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.29. show#
Show a design in openroad
File: show.py
3.19.29.1. Methods#
- ShowTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- ShowTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- ShowTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- ShowTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- ShowTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- ShowTask.get_show_jobroot() Project | None[source]#
Project used to resolve files for the source
shownode.When
shownodecarries a jobname, returns the matching history project (or a fresh copy with that jobname applied if no history entry exists). Otherwise returns the current project (which may beNoneoutside of a runtime context).
- ShowTask.get_supported_task_extentions()[source]#
Returns a list of file extensions supported by this task. This method must be implemented by subclasses.
Order is meaningful: list them best view of a design first. A task that reads several formats is the only thing that knows how they rank against each other – openroad reading
["odb", "def", "vg"]is stating that an odb beats the def beside it, which beats the netlist – andget_extension_map()builds the search orderProject.showuses out of those statements. A task supporting one extension says nothing either way.
- ShowTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- ShowTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- ShowTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.29.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.29.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
bool |
exit the tool after the file is opened |
|
file |
path to the file to open |
|
str |
extension of the file to open |
|
(str,str,str) |
source node (jobname, step, index) the file came from; not always available |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.29.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
str |
typical |
|
bool |
False |
|
str |
vg |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.30. cleanup_synth#
A task for cleaning up synthesized netlists using OpenROAD. Mainly used to remove buffers and dead logic inserted during synthesis from yosys.
Can also run a setup repair pass over the synthesized netlist. Synthesis optimizes against a simple delay and capacitance model, so its gate sizing is systematically off in a way a liberty-accurate pass can correct, and correcting it here means placement is given cells that are already close to their final size. The pass is off by default because it moves the quality of results of every design.
Buffer removal and timing repair are alternatives rather than additive, so enabling both is rejected during setup.
File: synth_cleanup.py
3.19.30.1. Methods#
- CleanupSynthTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- CleanupSynthTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- CleanupSynthTask.add_openroad_rszphases(phases: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds phases to the explicit order of setup optimization phases.
Phases are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- CleanupSynthTask.add_openroad_rszsequence(moves: str | List[str], step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds moves to the explicit order of setup optimization moves.
Moves are appended in call order. The default is empty, which leaves the tool to pick its own ordering.
- Parameters:
- CleanupSynthTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- CleanupSynthTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- CleanupSynthTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- CleanupSynthTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- CleanupSynthTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_removebuffers(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the removal of buffers inserted during synthesis.
- Parameters:
enable – True to remove synthesis buffers, False to keep them.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_removedeadlogic(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the removal of logic that does not drive a primary output.
- Parameters:
enable – True to remove dead logic, False to keep it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- CleanupSynthTask.set_openroad_repairsynthtiming(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables setup timing repair on the synthesized netlist.
- Parameters:
enable – True to repair timing, False to leave the netlist as synthesized.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.30.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.30.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
str |
corner to use for power analysis |
|
bool |
remove logic which does not drive a primary output |
|
bool |
remove buffers inserted by synthesis |
|
bool |
true/false, perform setup timing repair on the synthesized netlist. No placement exists yet, so this runs on wire load models and is most useful for correcting gate sizing rather than wire delay |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
true/false, when true hold repair is allowed to insert buffers that cause setup violations |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max capacitance repairs in percent (0 - 100) |
|
str |
default corner to use for parasitic extraction |
|
float |
specifies the margin to apply when performing hold repair |
|
bool |
true/false, when true only cells sharing the same liberty footprint are considered when swapping gates |
|
float<0.0..100.0> |
maximum number of buffers hold repair may insert, as a percentage of the instance count, unset uses the tool default |
|
int<1..> |
maximum number of optimization iterations timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of optimization passes timing repair may run, unset uses the tool default |
|
int<1..> |
maximum number of repairs setup repair may make in a single pass, unset uses the tool default |
|
float<0.0..100.0> |
maximum percentage of the core area the resizer is allowed to use, unset uses the tool default |
|
float<0.0..> |
maximum length a wire may reach before design repair inserts a buffer, unset lets the tool pick the length that avoids slew violations |
|
file |
file used to specify the parasitics for estimation |
|
[enum] |
explicit order of setup optimization phases, an empty list uses the tool default, note the tool appends its critical threshold voltage swap phase to any of its legacy phases. Allowed values: CRIT_VT_SWAP, ENDPOINT_FANIN, GLOBAL_SIZING, LAST_GASP, LEGACY, REROUTE, STARTPOINT_FANOUT, TNS, WNS, WNS_CONE, WNS_PATH |
|
float<0.0..100.0> |
percentage of paths to attempt to recover power (0 - 100) |
|
float<0.0..100.0> |
percentage of violating nets to attempt to repair (0 - 100) |
|
[enum] |
explicit order of setup optimization moves, an empty list uses the tool default. Allowed values: buffer, clone, reroute, size, size_down, size_down_fanout, sizeup, sizeup_match, split, swap, unbuffer, vt_swap |
|
float |
specifies the margin to apply when performing setup repair |
|
bool |
true/false, skip buffer removal optimization |
|
bool |
true/false, skip rebuffering and load splitting optimizations |
|
bool |
true/false, skip the final critical threshold voltage (VT) swap optimization |
|
bool |
true/false, skip the greedy gate resizing pass that runs at the end of setup repair to pick up any slack the main optimization left |
|
bool |
true/false, skip gate cloning optimization |
|
bool |
true/false, skip pin swap optimization |
|
bool |
true/false, skip down-sizing gates that are not on the critical path |
|
bool |
true/false, skip threshold voltage (VT) swap optimization |
|
float<0.0..100.0> |
specifies the amount of margin to apply to max slew repairs in percent (0 - 100) |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
3.19.30.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
bool |
False |
|
(int<1..>,int<1..>) |
(16, 16) |
|
str |
typical |
|
bool |
True |
|
bool |
True |
|
bool |
False |
|
{enum} |
|
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
str |
typical |
|
float |
0.0 |
|
bool |
False |
|
float<0.0..100.0> |
100 |
|
float<0.0..100.0> |
100 |
|
[enum] |
|
|
float |
0.0 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
float<0.0..100.0> |
0.0 |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.19.31. write_data#
Write output files
File: write_data.py
3.19.31.1. Methods#
- WriteViewsTask.add_openroad_debuglevel(tool: str, category: str, level: int, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Configures the debug logging level for a specific OpenROAD tool and category.
- Parameters:
tool – The name of the OpenROAD tool (e.g., “GRT”, “PSM”).
category – The specific debug category or keyword within the tool.
level – The integer verbosity level for the debug output.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing debug level configuration. If False, appends this configuration to the existing list.
- WriteViewsTask.add_openroad_globalconnectfileset(library: str, fileset: str, step: str | None = None, index: str | None = None, clobber: bool = False)[source]#
Adds a library and fileset pair to the global connect configuration.
- Parameters:
library – The name of the library.
fileset – The name of the fileset.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing global connect settings. If False, appends to the existing settings.
- WriteViewsTask.add_openroad_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenROAD execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘routing_congestion’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
- WriteViewsTask.get_clock(clock_units_multiplier: float = 1.0) Tuple[str, float][source]#
Finds the fastest clock the SDC files of this node define.
- Parameters:
clock_units_multiplier – Scale applied to the period before it is returned.
- Returns:
The name and period of the fastest clock, either of which is None when the SDC files do not give it.
- WriteViewsTask.get_clock_port() str | None[source]#
Finds the port the fastest clock of this node is attached to.
This is the name the clock carries in the design, which is not the name of the clock itself:
create_clock -name core_clock [get_ports clock]names a clockcore_clockon a portclock. A tool that has to agree with the SDC on what the clock pin is called – one generating the RTL the SDC constrains, say – wants this and notget_clock().- Returns:
The port name, None when the SDC files do not give it or the fastest clock is virtual and so attached to no port.
- WriteViewsTask.set_asic_var(key: str, defvalue=None, check_pdk: bool = True, require_pdk: bool = False, pdk_key: str = None, check_mainlib: bool = True, require_mainlib: bool = False, mainlib_key: str = None, require: bool = False)[source]#
Set an ASIC parameter based on a prioritized lookup order.
This method attempts to set a parameter identified by key by checking values in a specific order: 1. The main library 2. The PDK 3. A provided default value (defvalue)
The first non-empty or non-None value found in this hierarchy will be used to set the parameter. If no value is found and defvalue is not provided, the parameter will not be set unless explicitly required.
- Parameters:
key – The string key for the parameter to be set. This key is used to identify the parameter within the current object (self) and, by default, within the main library and PDK.
defvalue – An optional default value to use if the parameter is not found in the main library or PDK. If None and the parameter is not found, it will not be set unless require is True.
check_pdk – If True, the method will attempt to retrieve the parameter from the PDK. Defaults to True.
require_pdk – If True, the parameter must be defined in the PDK. An error will be raised if it’s not found and check_pdk is True. Defaults to False.
pdk_key – The specific key to use when looking up the parameter in the PDK. If None, key will be used.
check_mainlib – If True, the method will attempt to retrieve the parameter from the main library. Defaults to True.
require_mainlib – If True, the parameter must be defined in the main library. An error will be raised if it’s not found and check_mainlib is True. Defaults to False.
mainlib_key – The specific key to use when looking up the parameter in the main library. If None, key will be used.
require – If True, the parameter must be set by this method (either from a source or defvalue). An error will be raised if it cannot be set. Defaults to False.
- WriteViewsTask.set_openroad_applypexcorrection(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables the calibrated per-layer pex correction.
When enabled (the default) the PDK’s
rccorrectionfactors scale therclayervalues beforeset_layer_rc, so the pre-route parasitic estimate tracks signoff extraction. Disable it to run a node against the raw, uncalibrated estimate. A PDK with norccorrectionis unaffected either way.- Parameters:
enable – True to apply the correction, False to use the raw rclayer values.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_enablehier(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables hierarchical design support in OpenROAD.
- Parameters:
enable – True to enable hierarchical design support, False to disable it.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_enableimages(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables the generation of design images at the end of the task.
- Parameters:
enable – True to generate images, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_grtresistanceaware(enable: bool, step: str | None = None, index: str | None = None)[source]#
Enables or disables resistance-aware global routing.
Applies to the main global route and to the incremental global routes issued around detailed placement.
- Parameters:
enable – True to enable, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_heatmapbins(x: int, y: int, step: str | None = None, index: str | None = None) None[source]#
Configures the resolution of the heatmap images.
- Parameters:
x – The number of bins in the X direction.
y – The number of bins in the Y direction.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_loadsdcs(enable: bool, step: str | None = None, index: str | None = None) None[source]#
Enables or disables loading SDC files before APR.
- Parameters:
enable – True to load SDC files, False to disable.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
- WriteViewsTask.set_openroad_powercorner(corner: str, step: str | None = None, index: str | None = None) None[source]#
Sets the specific process corner used for power analysis.
- Parameters:
corner – The name of the timing/power corner.
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
3.19.31.2. Data root#
Root |
Specifications |
openroad-ref |
|
siliconcompiler |
|
3.19.31.3. Variables#
Parameters |
Type |
Help |
|
bool |
apply the calibrated per-layer pex correction (pdk ‘rccorrection’) to the pre-route parasitic estimate |
|
{(str,str,int<0..>)} |
list of “tool key level” to enable debugging of OpenROAD |
|
bool |
Enable hierarchical design support in OpenROAD when linking |
|
[(str,str)] |
list of libraries and filesets to generate connects from |
|
bool |
true/false, when true global routing will consider wire resistance |
|
bool |
used to indicate if global routing information should be loaded |
|
bool |
used to indicate if SDC files should be loaded before APR |
|
file |
generic opensta SDC file |
|
int<1..> |
Factor to apply when writing the abstract lef |
|
bool |
true/false, fill all layers when writing the abstract lef |
|
bool |
true/false, enable generating images of the design at the end of the task |
|
(int<1..>,int<1..>) |
number of (X, Y) bins to use for heatmap image generation |
|
{str} |
set of pex corners to perform extraction on |
|
str |
corner to use for power analysis |
|
bool |
true/false, when true enables IR drop analysis |
|
[str] |
list of nets to skip power grid analysis on |
|
{enum} |
list of reports and images to generate, auto generated. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
str |
default corner to use for parasitic extraction |
|
file |
file used to specify the parasitics for estimation |
|
{enum} |
list of reports and images skip. Allowed values: check_setup, clock_placement, clock_skew, clock_trees, design_stats, drv_violations, floating_nets, fmax, hold, ir_drop, logicdepth, markers_view, module_view, optimization_placement, overdriven_nets, placement_density, placement_view, power, power_density, report_buffers, routing_congestion, routing_view, scenarios, setup, snapshot, unconstrained |
|
bool |
if true will generate path groups for timing reporting |
|
float |
timing derating factor to use for hold corners |
|
float |
timing derating factor to use for setup corners |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
|
bool |
true/false, when true enables reading in SPEF files. |
|
bool |
true/false, when true enables writing the CDL file for the design |
|
bool |
true/false, when true enables writing the liberty timing model for the design |
|
bool |
true/false, when true enables writing the SDF timing model for the design |
|
bool |
true/false, when true enables writing the SPEF file for the design |
3.19.31.4. Configuration#
Keypath |
Type |
Value |
str |
openroad |
|
enum |
tcl |
|
[file] |
|
|
[dir] |
|
|
[str] |
^\[ERROR |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
bool |
True |
|
bool |
False |
|
bool |
False |
|
bool |
False |
|
bool |
True |
|
file |
|
|
int<1..> |
10 |
|
bool |
True |
|
bool |
True |
|
(int<1..>,int<1..>) |
(16, 16) |
|
{str} |
typical |
|
str |
typical |
|
bool |
True |
|
{enum} |
|
|
str |
typical |
|
bool |
True |
|
float |
0.0 |
|
float |
0.0 |
|
int<1..> |
10 |
|
bool |
False |
|
bool |
True |
|
bool |
False |
|
bool |
True |
|
bool |
True |
|
bool |
True |
[str] |
>=24Q3-2011 |
|
[str] |
-version |
3.20. opensta#
OpenSTA is a gate level static timing verifier.
Documentation: https://opensta.readthedocs.io/en/latest/
Sources: The-OpenROAD-Project/OpenSTA
Installation: The-OpenROAD-Project/OpenSTA (also installed with OpenROAD)
File: __init__.py
3.20.1. timing#
Generate static timing reports for an ASIC target device.
File: timing.py
3.20.1.1. Methods#
- TimingTask.add_opensta_poweractivity(scope: str, library: str, fileset: str, clobber: bool = False, step: str | None = None, index: str | None = None)[source]#
Adds a VCD source for vector-based power analysis.
- Parameters:
scope (str) – The instance path of the design top within the VCD.
library (str) – The library (design) providing the VCD fileset.
fileset (str) – The fileset containing the VCD file.
clobber (bool) – If True, overwrites any existing entries. If False (default), the entry is appended.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
- TimingTask.add_opensta_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenSTA execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘clock_skew’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
3.20.1.2. Data root#
Root |
Specifications |
refdir-root |
|
siliconcompiler |
|
3.20.1.3. Variables#
Parameters |
Type |
Help |
|
file |
generic opensta SDC file |
|
[(str,str,str)] |
list of (VCD scope, library, fileset) tuples specifying VCD files to read for vector-based power analysis. The scope is the instance path of the design top within the VCD. If empty, a VCD is read from the active filesets (or the step input) with no scope. |
|
{enum} |
list of reports to generate, auto generated. Allowed values: check_setup, clock_skew, design_stats, drv_violations, fmax, hold, logicdepth, power, scenarios, setup, unconstrained |
|
{enum} |
list of reports to skip. Allowed values: check_setup, clock_skew, design_stats, drv_violations, fmax, hold, logicdepth, power, scenarios, setup, unconstrained |
|
str |
timing mode to use |
|
int<1..> |
number of paths to report timing for |
|
bool |
if true will generate separate path groups per clock |
|
bool |
if true will write liberty for every corner |
|
bool |
if true will write sdf for every corner |
3.20.1.4. Configuration#
Keypath |
Type |
Value |
str |
sta |
|
enum |
tcl |
|
[dir] |
|
|
[str] |
^\[ERROR|^Error |
|
[str] |
^\[WARNING|^Warning |
|
{str} |
|
|
[file] |
|
|
enum |
log |
|
str |
log |
|
enum |
log |
|
str |
log |
|
int<1..> |
2 |
|
|
file |
|
|
{enum} |
|
|
int<1..> |
10 |
|
bool |
False |
|
bool |
False |
|
bool |
False |
[str] |
>=2.6.2 |
|
[str] |
-version |
3.20.2. fpga_timing#
Generate static timing reports for an FPGA target device.
File: timing.py
3.20.2.1. Methods#
- FPGATimingTask.add_opensta_poweractivity(scope: str, library: str, fileset: str, clobber: bool = False, step: str | None = None, index: str | None = None)[source]#
Adds a VCD source for vector-based power analysis.
- Parameters:
scope (str) – The instance path of the design top within the VCD.
library (str) – The library (design) providing the VCD fileset.
fileset (str) – The fileset containing the VCD file.
clobber (bool) – If True, overwrites any existing entries. If False (default), the entry is appended.
step (str, optional) – The specific step to apply this configuration to.
index (str, optional) – The specific index to apply this configuration to.
- FPGATimingTask.add_opensta_skipreport(report_type: List[str] | str, step: str | None = None, index: str | None = None, clobber: bool = False) None[source]#
Adds or sets report types to be skipped during OpenSTA execution.
- Parameters:
report_type – The name of the report(s) to skip (e.g., ‘clock_skew’).
step – The specific step to apply this configuration to.
index – The specific index to apply this configuration to.
clobber – If True, overwrites the existing list of skipped reports. If False, appends to the existing list.
-
FPGATimingTask.set_opensta_topnpaths(n: int,