2. Pre-Defined Flows#
The following are examples are pre-built flows that come with SiliconCompiler which you can use for your own builds.
See the pre-built targets for examples on how these are used in conjunction with pdks, tools and libraries.
2.1. asicflow#
A configurable ASIC compilation flow.
This flow targets ASIC designs, taking RTL through a complete synthesis, place-and-route, and finishing flow.
The flow is divided into the following major steps:
elaborate: RTL elaboration using Slang.
synthesis: RTL synthesis using Yosys.
- floorplan: Floorplanning, including macro placement, tapcell/endcap
insertion, power grid generation, and pin placement.
place: Global and detailed placement.
cts: Clock tree synthesis and post-CTS timing repair.
route: Global and detailed routing.
dfm: Design-for-manufacturing steps, primarily metal fill.
write: Writing out final views of the design (GDSII, etc.).
The synthesis, floorplan, place, cts, and route steps support parallel execution to explore different strategies. This can be configured by setting the corresponding ‘_np’ argument to a value greater than 1.
- Args:
syn_np (int): Number of parallel synthesis jobs to launch.
floorplan_np (int): Number of parallel floorplan jobs to launch.
place_np (int): Number of parallel placement jobs to launch.
cts_np (int): Number of parallel clock tree synthesis jobs to launch.
route_np (int): Number of parallel routing jobs to launch.
File: asicflow.py
2.1.1. Graph#
2.1.2. Nodes#
2.1.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.1.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.1.2.3. synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.1.2.4. synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.1.2.5. synthesis.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.1.2.6. floorplan.init/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.1.2.7. floorplan.init/1#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.1.2.8. floorplan.init/2#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.1.2.9. floorplan.macro_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '0') |
|
str |
macro_placement |
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
|
str |
openroad |
2.1.2.10. floorplan.macro_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '1') |
|
str |
macro_placement |
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
|
str |
openroad |
2.1.2.11. floorplan.macro_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '2') |
|
str |
macro_placement |
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
|
str |
openroad |
2.1.2.12. floorplan.tapcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '0') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.1.2.13. floorplan.tapcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '1') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.1.2.14. floorplan.tapcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '2') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.1.2.15. floorplan.power_grid/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '0') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.1.2.16. floorplan.power_grid/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '1') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.1.2.17. floorplan.power_grid/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '2') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.1.2.18. floorplan.pin_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '0') |
|
str |
pin_placement |
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
|
str |
openroad |
2.1.2.19. floorplan.pin_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '1') |
|
str |
pin_placement |
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
|
str |
openroad |
2.1.2.20. floorplan.pin_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '2') |
|
str |
pin_placement |
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
|
str |
openroad |
2.1.2.21. floorplan.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.1.2.22. place.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.1.2.23. place.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.1.2.24. place.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.1.2.25. place.repair_design/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '0') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.1.2.26. place.repair_design/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '1') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.1.2.27. place.repair_design/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '2') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.1.2.28. place.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '0') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.1.2.29. place.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '1') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.1.2.30. place.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '2') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.1.2.31. place.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.1.2.32. cts.clock_tree_synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
|
str |
openroad |
2.1.2.33. cts.clock_tree_synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
|
str |
openroad |
2.1.2.34. cts.clock_tree_synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
|
str |
openroad |
2.1.2.35. cts.repair_timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '0') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.1.2.36. cts.repair_timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '1') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.1.2.37. cts.repair_timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '2') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.1.2.38. cts.fillcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '0') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.1.2.39. cts.fillcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '1') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.1.2.40. cts.fillcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '2') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.1.2.41. cts.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.1.2.42. route.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.1.2.43. route.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.1.2.44. route.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.1.2.45. route.antenna_repair/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '0') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.1.2.46. route.antenna_repair/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '1') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.1.2.47. route.antenna_repair/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '2') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.1.2.48. route.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '0') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.1.2.49. route.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '1') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.1.2.50. route.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '2') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.1.2.51. route.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.1.2.52. dfm.metal_fill/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.min', '0') |
|
str |
fillmetal_insertion |
|
str |
siliconcompiler.tools.openroad.fillmetal_insertion/FillMetalTask |
|
str |
openroad |
2.1.2.53. write.gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.1.2.54. write.views/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
write_data |
|
str |
siliconcompiler.tools.openroad.write_data/WriteViewsTask |
|
str |
openroad |
2.2. hlsasicflow#
A High-Level Synthesis (HLS) extension of the ASICFlow.
This class inherits from ASICFlow and modifies it to support C-based HLS. It replaces the initial ‘elaborate’ step with a ‘convert’ step, which handles the conversion of HLS C code to RTL using the Bambu tool.
File: asicflow.py
2.2.1. Graph#
2.2.2. Nodes#
2.2.2.1. convert/0#
Keypath |
Type |
Value |
str |
convert |
|
str |
siliconcompiler.tools.bambu.convert/ConvertTask |
|
str |
bambu |
2.2.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.2.2.3. synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.2.2.4. synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.2.2.5. synthesis.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.2.2.6. floorplan.init/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.2.2.7. floorplan.init/1#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.2.2.8. floorplan.init/2#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.2.2.9. floorplan.macro_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '0') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.2.2.10. floorplan.macro_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '1') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.2.2.11. floorplan.macro_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '2') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.2.2.12. floorplan.tapcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '0') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.2.2.13. floorplan.tapcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '1') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.2.2.14. floorplan.tapcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '2') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.2.2.15. floorplan.power_grid/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '0') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.2.2.16. floorplan.power_grid/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '1') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.2.2.17. floorplan.power_grid/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '2') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.2.2.18. floorplan.pin_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '0') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.2.2.19. floorplan.pin_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '1') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.2.2.20. floorplan.pin_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '2') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.2.2.21. floorplan.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.2.2.22. place.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.2.2.23. place.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.2.2.24. place.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.2.2.25. place.repair_design/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '0') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.2.2.26. place.repair_design/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '1') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.2.2.27. place.repair_design/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '2') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.2.2.28. place.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '0') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.2.2.29. place.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '1') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.2.2.30. place.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '2') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.2.2.31. place.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.2.2.32. cts.clock_tree_synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.2.2.33. cts.clock_tree_synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.2.2.34. cts.clock_tree_synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.2.2.35. cts.repair_timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '0') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.2.2.36. cts.repair_timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '1') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.2.2.37. cts.repair_timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '2') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.2.2.38. cts.fillcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '0') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.2.2.39. cts.fillcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '1') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.2.2.40. cts.fillcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '2') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.2.2.41. cts.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.2.2.42. route.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.2.2.43. route.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.2.2.44. route.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.2.2.45. route.antenna_repair/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '0') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.2.2.46. route.antenna_repair/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '1') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.2.2.47. route.antenna_repair/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '2') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.2.2.48. route.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '0') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.2.2.49. route.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '1') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.2.2.50. route.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '2') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.2.2.51. route.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.2.2.52. dfm.metal_fill/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.min', '0') |
|
str |
fillmetal_insertion |
|
str |
siliconcompiler.tools.openroad.fillmetal_insertion/FillMetalTask |
|
str |
openroad |
2.2.2.53. write.gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.2.2.54. write.views/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
write_data |
|
str |
siliconcompiler.tools.openroad.write_data/WriteViewsTask |
|
str |
openroad |
2.3. vhdlasicflow#
A VHDL-based ASIC synthesis flow.
This class extends the standard ASICFlow to support VHDL input by replacing the initial Verilog-focused ‘elaborate’ step with a ‘convert’ step. This new step uses GHDL to analyze and elaborate the VHDL design before synthesis.
File: asicflow.py
2.3.1. Graph#
2.3.2. Nodes#
2.3.2.1. convert/0#
Keypath |
Type |
Value |
str |
convert |
|
str |
siliconcompiler.tools.ghdl.convert/ConvertTask |
|
str |
ghdl |
2.3.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.3.2.3. synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.3.2.4. synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.3.2.5. synthesis.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.3.2.6. floorplan.init/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.3.2.7. floorplan.init/1#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.3.2.8. floorplan.init/2#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.3.2.9. floorplan.macro_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '0') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.3.2.10. floorplan.macro_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '1') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.3.2.11. floorplan.macro_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '2') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.3.2.12. floorplan.tapcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '0') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.3.2.13. floorplan.tapcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '1') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.3.2.14. floorplan.tapcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '2') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.3.2.15. floorplan.power_grid/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '0') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.3.2.16. floorplan.power_grid/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '1') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.3.2.17. floorplan.power_grid/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '2') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.3.2.18. floorplan.pin_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '0') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.3.2.19. floorplan.pin_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '1') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.3.2.20. floorplan.pin_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '2') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.3.2.21. floorplan.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.3.2.22. place.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.3.2.23. place.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.3.2.24. place.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.3.2.25. place.repair_design/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '0') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.3.2.26. place.repair_design/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '1') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.3.2.27. place.repair_design/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '2') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.3.2.28. place.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '0') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.3.2.29. place.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '1') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.3.2.30. place.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '2') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.3.2.31. place.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.3.2.32. cts.clock_tree_synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.3.2.33. cts.clock_tree_synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.3.2.34. cts.clock_tree_synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.3.2.35. cts.repair_timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '0') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.3.2.36. cts.repair_timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '1') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.3.2.37. cts.repair_timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '2') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.3.2.38. cts.fillcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '0') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.3.2.39. cts.fillcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '1') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.3.2.40. cts.fillcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '2') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.3.2.41. cts.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.3.2.42. route.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.3.2.43. route.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.3.2.44. route.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.3.2.45. route.antenna_repair/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '0') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.3.2.46. route.antenna_repair/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '1') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.3.2.47. route.antenna_repair/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '2') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.3.2.48. route.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '0') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.3.2.49. route.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '1') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.3.2.50. route.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '2') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.3.2.51. route.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.3.2.52. dfm.metal_fill/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.min', '0') |
|
str |
fillmetal_insertion |
|
str |
siliconcompiler.tools.openroad.fillmetal_insertion/FillMetalTask |
|
str |
openroad |
2.3.2.53. write.gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.3.2.54. write.views/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
write_data |
|
str |
siliconcompiler.tools.openroad.write_data/WriteViewsTask |
|
str |
openroad |
2.4. sv2vasicflow#
A SystemVerilog-to-Verilog extension of the ASICFlow.
This flow is intended for designs written in SystemVerilog that may not be fully supported by downstream synthesis or APR tools. It inserts a ‘convert’ step using SV2V before the standard ‘elaborate’ step to ensure the design is in a compatible Verilog format.
File: asicflow.py
2.4.1. Graph#
2.4.2. Nodes#
2.4.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.4.2.2. convert/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
convert |
|
str |
siliconcompiler.tools.sv2v.convert/ConvertTask |
|
str |
sv2v |
2.4.2.3. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.4.2.4. synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.4.2.5. synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.4.2.6. synthesis.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.4.2.7. floorplan.init/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.4.2.8. floorplan.init/1#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.4.2.9. floorplan.init/2#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.4.2.10. floorplan.macro_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '0') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.4.2.11. floorplan.macro_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '1') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.4.2.12. floorplan.macro_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.init', '2') |
|
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.4.2.13. floorplan.tapcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '0') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.4.2.14. floorplan.tapcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '1') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.4.2.15. floorplan.tapcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '2') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.4.2.16. floorplan.power_grid/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '0') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.4.2.17. floorplan.power_grid/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '1') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.4.2.18. floorplan.power_grid/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '2') |
|
str |
power_grid |
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
|
str |
openroad |
2.4.2.19. floorplan.pin_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '0') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.4.2.20. floorplan.pin_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '1') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.4.2.21. floorplan.pin_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '2') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.4.2.22. floorplan.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.4.2.23. place.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.4.2.24. place.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.4.2.25. place.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.4.2.26. place.repair_design/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '0') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.4.2.27. place.repair_design/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '1') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.4.2.28. place.repair_design/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '2') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.4.2.29. place.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '0') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.4.2.30. place.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '1') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.4.2.31. place.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '2') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.4.2.32. place.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.4.2.33. cts.clock_tree_synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.4.2.34. cts.clock_tree_synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.4.2.35. cts.clock_tree_synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.4.2.36. cts.repair_timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '0') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.4.2.37. cts.repair_timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '1') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.4.2.38. cts.repair_timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '2') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.4.2.39. cts.fillcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '0') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.4.2.40. cts.fillcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '1') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.4.2.41. cts.fillcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '2') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.4.2.42. cts.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.4.2.43. route.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.4.2.44. route.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.4.2.45. route.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.4.2.46. route.antenna_repair/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '0') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.4.2.47. route.antenna_repair/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '1') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.4.2.48. route.antenna_repair/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '2') |
|
str |
antenna_repair |
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
|
str |
openroad |
2.4.2.49. route.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '0') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.4.2.50. route.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '1') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.4.2.51. route.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '2') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.4.2.52. route.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.4.2.53. dfm.metal_fill/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.min', '0') |
|
str |
fillmetal_insertion |
|
str |
siliconcompiler.tools.openroad.fillmetal_insertion/FillMetalTask |
|
str |
openroad |
2.4.2.54. write.gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.4.2.55. write.views/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
write_data |
|
str |
siliconcompiler.tools.openroad.write_data/WriteViewsTask |
|
str |
openroad |
2.5. chiselasicflow#
A Chisel-based ASIC synthesis flow.
This class extends the standard ASICFlow to support designs written in the Chisel hardware construction language. It replaces the Verilog-focused ‘elaborate’ step with a ‘convert’ step that uses the Chisel compiler to generate Verilog from the Chisel source before synthesis.
File: asicflow.py
2.5.1. Graph#
2.5.2. Nodes#
2.5.2.1. convert/0#
Keypath |
Type |
Value |
str |
convert |
|
str |
siliconcompiler.tools.chisel.convert/ConvertTask |
|
str |
chisel |
2.5.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.5.2.3. synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.5.2.4. synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('convert', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.5.2.5. synthesis.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.5.2.6. floorplan.init/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.5.2.7. floorplan.init/1#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.5.2.8. floorplan.init/2#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis.min', '0') |
|
str |
init_floorplan |
|
str |
siliconcompiler.tools.openroad.init_floorplan/InitFloorplanTask |
|
str |
openroad |
2.5.2.9. floorplan.macro_placement/0#
Keypath |
Type |
Value |
|
[(str,str)] |
('floorplan.init', '0') |
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.5.2.10. floorplan.macro_placement/1#
Keypath |
Type |
Value |
|
[(str,str)] |
('floorplan.init', '1') |
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.5.2.11. floorplan.macro_placement/2#
Keypath |
Type |
Value |
|
[(str,str)] |
('floorplan.init', '2') |
str |
macro_placement |
|
|
str |
siliconcompiler.tools.openroad.macro_placement/MacroPlacementTask |
str |
openroad |
2.5.2.12. floorplan.tapcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '0') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.5.2.13. floorplan.tapcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '1') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.5.2.14. floorplan.tapcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.macro_placement', '2') |
|
str |
endcap_tapcell_insertion |
|
str |
siliconcompiler.tools.openroad.endcap_tapcell_insertion/EndCapTapCellTask |
|
str |
openroad |
2.5.2.15. floorplan.power_grid/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '0') |
|
str |
power_grid |
|
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
str |
openroad |
2.5.2.16. floorplan.power_grid/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '1') |
|
str |
power_grid |
|
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
str |
openroad |
2.5.2.17. floorplan.power_grid/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.tapcell', '2') |
|
str |
power_grid |
|
|
str |
siliconcompiler.tools.openroad.power_grid/PowerGridTask |
str |
openroad |
2.5.2.18. floorplan.pin_placement/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '0') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.5.2.19. floorplan.pin_placement/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '1') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.5.2.20. floorplan.pin_placement/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.power_grid', '2') |
|
str |
pin_placement |
|
|
str |
siliconcompiler.tools.openroad.pin_placement/PinPlacementTask |
str |
openroad |
2.5.2.21. floorplan.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.5.2.22. place.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.5.2.23. place.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.5.2.24. place.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('floorplan.min', '0') |
|
str |
global_placement |
|
str |
siliconcompiler.tools.openroad.global_placement/GlobalPlacementTask |
|
str |
openroad |
2.5.2.25. place.repair_design/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '0') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.5.2.26. place.repair_design/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '1') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.5.2.27. place.repair_design/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.global', '2') |
|
str |
repair_design |
|
str |
siliconcompiler.tools.openroad.repair_design/RepairDesignTask |
|
str |
openroad |
2.5.2.28. place.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '0') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.5.2.29. place.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '1') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.5.2.30. place.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.repair_design', '2') |
|
str |
detailed_placement |
|
str |
siliconcompiler.tools.openroad.detailed_placement/DetailedPlacementTask |
|
str |
openroad |
2.5.2.31. place.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.5.2.32. cts.clock_tree_synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.5.2.33. cts.clock_tree_synthesis/1#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.5.2.34. cts.clock_tree_synthesis/2#
Keypath |
Type |
Value |
[(str,str)] |
('place.min', '0') |
|
str |
clock_tree_synthesis |
|
|
str |
siliconcompiler.tools.openroad.clock_tree_synthesis/CTSTask |
str |
openroad |
2.5.2.35. cts.repair_timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '0') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.5.2.36. cts.repair_timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '1') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.5.2.37. cts.repair_timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.clock_tree_synthesis', '2') |
|
str |
repair_timing |
|
str |
siliconcompiler.tools.openroad.repair_timing/RepairTimingTask |
|
str |
openroad |
2.5.2.38. cts.fillcell/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '0') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.5.2.39. cts.fillcell/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '1') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.5.2.40. cts.fillcell/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.repair_timing', '2') |
|
str |
fillercell_insertion |
|
str |
siliconcompiler.tools.openroad.fillercell_insertion/FillCellTask |
|
str |
openroad |
2.5.2.41. cts.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.5.2.42. route.global/0#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.5.2.43. route.global/1#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.5.2.44. route.global/2#
Keypath |
Type |
Value |
[(str,str)] |
('cts.min', '0') |
|
str |
global_route |
|
str |
siliconcompiler.tools.openroad.global_route/GlobalRouteTask |
|
str |
openroad |
2.5.2.45. route.antenna_repair/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '0') |
|
str |
antenna_repair |
|
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
str |
openroad |
2.5.2.46. route.antenna_repair/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '1') |
|
str |
antenna_repair |
|
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
str |
openroad |
2.5.2.47. route.antenna_repair/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.global', '2') |
|
str |
antenna_repair |
|
|
str |
siliconcompiler.tools.openroad.antenna_repair/AntennaRepairTask |
str |
openroad |
2.5.2.48. route.detailed/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '0') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.5.2.49. route.detailed/1#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '1') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.5.2.50. route.detailed/2#
Keypath |
Type |
Value |
[(str,str)] |
('route.antenna_repair', '2') |
|
str |
detailed_route |
|
str |
siliconcompiler.tools.openroad.detailed_route/DetailedRouteTask |
|
str |
openroad |
2.5.2.51. route.min/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.5.2.52. dfm.metal_fill/0#
Keypath |
Type |
Value |
[(str,str)] |
('route.min', '0') |
|
str |
fillmetal_insertion |
|
str |
siliconcompiler.tools.openroad.fillmetal_insertion/FillMetalTask |
|
str |
openroad |
2.5.2.53. write.gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.5.2.54. write.views/0#
Keypath |
Type |
Value |
[(str,str)] |
('dfm.metal_fill', '0') |
|
str |
write_data |
|
str |
siliconcompiler.tools.openroad.write_data/WriteViewsTask |
|
str |
openroad |
2.6. drcflow#
A design rule check (DRC) flow.
This flow is designed to perform a DRC run on an input GDSII file using KLayout.
File: drcflow.py
2.6.1. Graph#
2.6.2. Nodes#
2.6.2.1. drc/0#
Keypath |
Type |
Value |
str |
drc |
|
str |
siliconcompiler.tools.klayout.drc/DRCTask |
|
str |
klayout |
2.7. dvflow-icarus#
A configurable constrained random stimulus DV flow.
The verification pipeline includes the following steps:
compile: RTL sources are compiled into an intermediate format.
sim: The compiled design is simulated with a generated testbench.
The dvflow can be parametrized using the ‘np’ parameter. Setting ‘np’ > 1 results in multiple independent verification pipelines being launched in parallel.
Supported tools are:
‘icarus’: Compiles and simulates with the Icarus Verilog simulator.
‘icarus-cocotb’: Compiles with Icarus and runs cocotb Python testbenches.
‘verilator’: Compiles and simulates with Verilator.
‘verilator-cocotb’: Compiles with Verilator and runs cocotb Python testbenches.
‘xyce’: Simulates a netlist with the Xyce circuit simulator.
‘xdm-xyce’: Converts a design to a Xyce-compatible format and simulates.
File: dvflow.py
2.7.1. Graph#
2.7.2. Nodes#
2.7.2.1. compile/0#
Keypath |
Type |
Value |
str |
compile |
|
str |
siliconcompiler.tools.icarus.compile/CompileTask |
|
str |
icarus |
2.7.2.2. simulate/0#
Keypath |
Type |
Value |
[(str,str)] |
('compile', '0') |
|
str |
exec_input |
|
str |
siliconcompiler.tools.execute.exec_input/ExecInputTask |
|
str |
execute |
2.8. fpgaflow-nextpnr#
An open-source FPGA flow using Yosys and NextPNR.
This flow is tailored for FPGAs supported by the NextPNR tool, which handles placement, routing, and bitstream generation in a single step.
The flow consists of the following steps:
syn_fpga: Synthesize RTL into a device-specific netlist using Yosys.
- apr: Perform automatic place and route (APR) and generate the
bitstream using NextPNR.
File: fpgaflow.py
2.8.1. Graph#
2.8.2. Nodes#
2.8.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.8.2.2. syn_fpga/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_fpga |
|
str |
siliconcompiler.tools.yosys.syn_fpga/FPGASynthesis |
|
str |
yosys |
2.8.2.3. apr/0#
Keypath |
Type |
Value |
[(str,str)] |
('syn_fpga', '0') |
|
str |
apr |
|
str |
siliconcompiler.tools.nextpnr.apr/APRTask |
|
str |
nextpnr |
2.9. fpgaflow-vpr#
An open-source FPGA flow using Yosys, VPR, and GenFasm.
This flow is designed for academic and research FPGAs, utilizing VPR (Versatile Place and Route) for placement and routing.
The flow consists of the following steps:
elaborate: Elaborate the RTL design from sources.
synthesis: Synthesize the elaborated design into a netlist using Yosys.
place: Place the netlist components onto the FPGA architecture using VPR.
route: Route the connections between placed components using VPR.
bitstream: Generate the final bitstream using GenFasm.
File: fpgaflow.py
2.9.1. Graph#
2.9.2. Nodes#
2.9.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.9.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_fpga |
|
str |
siliconcompiler.tools.yosys.syn_fpga/FPGASynthesis |
|
str |
yosys |
2.9.2.3. place/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis', '0') |
|
str |
place |
|
str |
siliconcompiler.tools.vpr.place/PlaceTask |
|
str |
vpr |
2.9.2.4. route/0#
Keypath |
Type |
Value |
[(str,str)] |
('place', '0') |
|
str |
route |
|
str |
siliconcompiler.tools.vpr.route/RouteTask |
|
str |
vpr |
2.9.2.5. bitstream/0#
Keypath |
Type |
Value |
[(str,str)] |
('route', '0') |
|
str |
bitstream |
|
str |
siliconcompiler.tools.genfasm.bitstream/BitstreamTask |
|
str |
genfasm |
2.10. fpgaflow-vpr-open-sta#
An open-source FPGA flow using Yosys, VPR, GenFasm, and OpenSTA.
This flow is designed for academic and research FPGAs, utilizing VPR (Versatile Place and Route) for placement and routing and OpenSTA for post-implementation timing analysis.
The flow consists of the following steps:
elaborate: Elaborate the RTL design from sources.
synthesis: Synthesize the elaborated design into a netlist using Yosys.
place: Place the netlist components onto the FPGA architecture using VPR.
route: Route the connections between placed components using VPR.
bitstream: Generate the final bitstream using GenFasm.
timing: Perform post-implementation static timing analysis of the design.
File: fpgaflow.py
2.10.1. Graph#
2.10.2. Nodes#
2.10.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.10.2.2. synthesis/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_fpga |
|
str |
siliconcompiler.tools.yosys.syn_fpga/FPGASynthesis |
|
str |
yosys |
2.10.2.3. place/0#
Keypath |
Type |
Value |
[(str,str)] |
('synthesis', '0') |
|
str |
place |
|
str |
siliconcompiler.tools.vpr.place/PlaceTask |
|
str |
vpr |
2.10.2.4. route/0#
Keypath |
Type |
Value |
[(str,str)] |
('place', '0') |
|
str |
route |
|
str |
siliconcompiler.tools.vpr.route/RouteTask |
|
str |
vpr |
2.10.2.5. bitstream/0#
Keypath |
Type |
Value |
[(str,str)] |
('route', '0') |
|
str |
bitstream |
|
str |
siliconcompiler.tools.genfasm.bitstream/BitstreamTask |
|
str |
genfasm |
2.10.2.6. timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('route', '0') |
|
str |
fpga_timing |
|
str |
siliconcompiler.tools.opensta.timing/FPGATimingTask |
|
str |
opensta |
2.11. fpgaflow-xilinx#
An FPGA compilation flow targeting Xilinx devices using Vivado.
This flow uses the commercial Vivado toolchain for synthesis, placement, routing, and bitstream generation.
The flow consists of the following steps:
syn_fpga: Synthesize RTL into a device-specific netlist.
place: Place the synthesized netlist onto the FPGA fabric.
route: Route the connections between placed components.
bitstream: Generate the final bitstream for device programming.
File: fpgaflow.py
2.11.1. Graph#
2.11.2. Nodes#
2.11.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.11.2.2. syn_fpga/0#
Keypath |
Type |
Value |
[(str,str)] |
('elaborate', '0') |
|
str |
syn_fpga |
|
str |
siliconcompiler.tools.vivado.syn_fpga/SynthesisTask |
|
str |
vivado |
2.11.2.3. place/0#
Keypath |
Type |
Value |
[(str,str)] |
('syn_fpga', '0') |
|
str |
place |
|
str |
siliconcompiler.tools.vivado.place/PlaceTask |
|
str |
vivado |
2.11.2.4. route/0#
Keypath |
Type |
Value |
[(str,str)] |
('place', '0') |
|
str |
route |
|
str |
siliconcompiler.tools.vivado.route/RouteTask |
|
str |
vivado |
2.11.2.5. bitstream/0#
Keypath |
Type |
Value |
[(str,str)] |
('route', '0') |
|
str |
bitstream |
|
str |
siliconcompiler.tools.vivado.bitstream/BitstreamTask |
|
str |
vivado |
2.12. generate_rcx / 0#
A flow to generate OpenRCX parasitic extraction decks for OpenROAD.
This flow automates the process of characterizing a parasitic extraction tool to generate the necessary configuration files (RCX decks) for OpenROAD’s built-in OpenRCX engine. It works by comparing the output of a third-party “golden” extraction tool against OpenRCX’s results and calibrating OpenRCX accordingly.
The flow consists of the following main steps for each specified corner:
bench: A benchmark design with simple structures is created.
- pex: A user-provided third-party PEX tool is run on the benchmark
to generate a “golden” SPEF file.
- extract: The golden SPEF is used to generate a calibrated OpenRCX
deck.
File: generate_openroad_rcx.py
2.12.1. Graph#
2.12.2. Nodes#
2.12.2.1. bench/0#
Keypath |
Type |
Value |
str |
rcx_bench |
|
str |
siliconcompiler.tools.openroad.rcx_bench/ORXBenchTask |
|
str |
openroad |
2.12.2.2. pex/0#
Keypath |
Type |
Value |
[(str,str)] |
('bench', '0') |
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.12.2.3. pex/1#
Keypath |
Type |
Value |
[(str,str)] |
('bench', '0') |
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.12.2.4. pex/2#
Keypath |
Type |
Value |
[(str,str)] |
('bench', '0') |
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.12.2.5. extract/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.12.2.6. extract/1#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.12.2.7. extract/2#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.13. generate_rcx / 1#
A flow to generate OpenRCX parasitic extraction decks for OpenROAD.
This flow automates the process of characterizing a parasitic extraction tool to generate the necessary configuration files (RCX decks) for OpenROAD’s built-in OpenRCX engine. It works by comparing the output of a third-party “golden” extraction tool against OpenRCX’s results and calibrating OpenRCX accordingly.
The flow consists of the following main steps for each specified corner:
bench: A benchmark design with simple structures is created.
- pex: A user-provided third-party PEX tool is run on the benchmark
to generate a “golden” SPEF file.
- extract: The golden SPEF is used to generate a calibrated OpenRCX
deck.
File: generate_openroad_rcx.py
2.13.1. Graph#
2.13.2. Nodes#
2.13.2.1. bench/0#
Keypath |
Type |
Value |
str |
rcx_bench |
|
str |
siliconcompiler.tools.openroad.rcx_bench/ORXBenchTask |
|
str |
openroad |
2.13.2.2. pex/0#
Keypath |
Type |
Value |
[(str,str)] |
('bench', '0') |
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.13.2.3. extract/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.13.2.4. pex/1#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.13.2.5. extract/1#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.13.2.6. pex/2#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
nop |
|
str |
siliconcompiler.tools.builtin.nop/NOPTask |
|
str |
builtin |
2.13.2.7. extract/2#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
rcx_extract |
|
str |
siliconcompiler.tools.openroad.rcx_extract/ORXExtractTask |
|
str |
openroad |
2.14. interposerflow#
A flow to perform Redistribution Layer (RDL) routing and generate a GDS.
This flow is designed for creating interposers or other simple routing layers. It uses OpenROAD for RDL routing and KLayout to export the final layout to a GDSII file.
The flow consists of the following steps:
rdlroute: Performs RDL routing on the input design.
write_gds: Exports the routed design to a GDSII file.
File: interposerflow.py
2.14.1. Graph#
2.14.2. Nodes#
2.14.2.1. rdlroute/0#
Keypath |
Type |
Value |
str |
rdlroute |
|
str |
siliconcompiler.tools.openroad.rdlroute/RDLRouteTask |
|
str |
openroad |
2.14.2.2. write_gds/0#
Keypath |
Type |
Value |
[(str,str)] |
('rdlroute', '0') |
|
str |
export |
|
str |
siliconcompiler.tools.klayout.export/ExportTask |
|
str |
klayout |
2.15. lintflow-slang#
An RTL linting flow.
This flow is designed to check RTL source files for stylistic, semantic, and syntactic issues using a specified linting tool.
Supported tools:
‘slang’: A linter based on the Slang compiler.
‘verilator’: A linter based on the Verilator tool.
File: lintflow.py
2.15.1. Graph#
2.15.2. Nodes#
2.15.2.1. lint/0#
Keypath |
Type |
Value |
str |
lint |
|
str |
siliconcompiler.tools.slang.lint/Lint |
|
str |
slang |
2.16. showflow#
A minimal flow to display a design file using its associated viewer.
This flow is automatically generated and consists of a single node that runs a specific ‘show’ or ‘screenshot’ task for a given file format (e.g., GDS, DEF).
File: showflow.py
2.16.1. Graph#
2.16.2. Nodes#
2.16.2.1. show/0#
Keypath |
Type |
Value |
str |
show |
|
str |
siliconcompiler.tools.klayout.show/ShowTask |
|
str |
klayout |
2.17. signoffflow#
A flow for running LVS/DRC signoff on a GDS layout.
This flow performs two key physical verification steps in parallel:
Design Rule Checking (DRC) using Magic.
Layout Versus Schematic (LVS) checking using Netgen.
The LVS step first requires extracting a SPICE netlist from the layout, which is also handled by Magic. A final ‘join’ step ensures that both DRC and LVS tasks must complete successfully for the flow to finish.
File: signoffflow.py
2.17.1. Graph#
2.17.2. Nodes#
2.17.2.1. drc/0#
Keypath |
Type |
Value |
str |
drc |
|
str |
siliconcompiler.tools.magic.drc/DRCTask |
|
str |
magic |
2.17.2.2. extspice/0#
Keypath |
Type |
Value |
str |
extspice |
|
str |
siliconcompiler.tools.magic.extspice/ExtractTask |
|
str |
magic |
2.17.2.3. lvs/0#
Keypath |
Type |
Value |
[(str,str)] |
('extspice', '0') |
|
str |
lvs |
|
str |
siliconcompiler.tools.netgen.lvs/LVSTask |
|
str |
netgen |
2.17.2.4. signoff/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
join |
|
str |
siliconcompiler.tools.builtin.join/JoinTask |
|
str |
builtin |
2.18. synflow#
A configurable ASIC synthesis flow with static timing analysis.
This flow translates RTL designs into a gate-level netlist and then performs static timing analysis (STA) on the result. It allows for parallel execution of both synthesis and timing steps to explore different strategies or speed up execution.
- The flow consists of the following steps:
elaborate: Elaborates the RTL design from its source files.
- synthesis: Translates the elaborated RTL into a gate-level netlist
using Yosys.
- timing: Performs static timing analysis on the synthesized netlist
using OpenSTA.
File: synflow.py
2.18.1. Graph#
2.18.2. Nodes#
2.18.2.1. elaborate/0#
Keypath |
Type |
Value |
str |
elaborate |
|
str |
siliconcompiler.tools.slang.elaborate/Elaborate |
|
str |
slang |
2.18.2.2. synthesis/0#
Keypath |
Type |
Value |
float |
0.0 |
|
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.18.2.3. synthesis/1#
Keypath |
Type |
Value |
float |
0.0 |
|
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.18.2.4. synthesis/2#
Keypath |
Type |
Value |
float |
0.0 |
|
[(str,str)] |
('elaborate', '0') |
|
str |
syn_asic |
|
str |
siliconcompiler.tools.yosys.syn_asic/ASICSynthesis |
|
str |
yosys |
2.18.2.5. synmin/0#
Keypath |
Type |
Value |
[(str,str)] |
|
|
str |
minimum |
|
str |
siliconcompiler.tools.builtin.minimum/MinimumTask |
|
str |
builtin |
2.18.2.6. timing/0#
Keypath |
Type |
Value |
[(str,str)] |
('synmin', '0') |
|
str |
timing |
|
str |
siliconcompiler.tools.opensta.timing/TimingTask |
|
str |
opensta |
2.18.2.7. timing/1#
Keypath |
Type |
Value |
[(str,str)] |
('synmin', '0') |
|
str |
timing |
|
str |
siliconcompiler.tools.opensta.timing/TimingTask |
|
str |
opensta |
2.18.2.8. timing/2#
Keypath |
Type |
Value |
[(str,str)] |
('synmin', '0') |
|
str |
timing |
|
str |
siliconcompiler.tools.opensta.timing/TimingTask |
|
str |
opensta |
2.19. screenshotflow / 0#
A high resolution screenshot flow.
This flow is designed to generate a high resolution design image from a GDS or OAS file by preparing the layout, taking tiled screenshots, and merging them into a single image.
File: highresscreenshotflow.py
2.19.1. Graph#
2.19.2. Nodes#
2.19.2.1. import/0#
Keypath |
Type |
Value |
str |
importfiles |
|
str |
siliconcompiler.tools.builtin.importfiles/ImportFilesTask |
|
str |
builtin |
2.19.2.2. prepare/0#
Keypath |
Type |
Value |
[(str,str)] |
('import', '0') |
|
str |
operations |
|
str |
siliconcompiler.tools.klayout.operations/OperationsTask |
|
str |
klayout |
2.19.2.3. screenshot/0#
Keypath |
Type |
Value |
[(str,str)] |
('prepare', '0') |
|
str |
screenshot |
|
str |
siliconcompiler.tools.klayout.screenshot/ScreenshotTask |
|
str |
klayout |
2.19.2.4. merge/0#
Keypath |
Type |
Value |
[(str,str)] |
('screenshot', '0') |
|
str |
tile |
|
str |
siliconcompiler.tools.montage.tile/TileTask |
|
str |
montage |
2.20. screenshotflow / 1#
A high resolution screenshot flow.
This flow is designed to generate a high resolution design image from a GDS or OAS file by preparing the layout, taking tiled screenshots, and merging them into a single image.
File: highresscreenshotflow.py
2.20.1. Graph#
2.20.2. Nodes#
2.20.2.1. import/0#
Keypath |
Type |
Value |
str |
importfiles |
|
str |
siliconcompiler.tools.builtin.importfiles/ImportFilesTask |
|
str |
builtin |
2.20.2.2. screenshot/0#
Keypath |
Type |
Value |
[(str,str)] |
('import', '0') |
|
str |
screenshot |
|
str |
siliconcompiler.tools.klayout.screenshot/ScreenshotTask |
|
str |
klayout |
2.20.2.3. merge/0#
Keypath |
Type |
Value |
[(str,str)] |
('screenshot', '0') |
|
str |
tile |
|
str |
siliconcompiler.tools.montage.tile/TileTask |
|
str |
montage |